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UPD301B Datasheet(PDF) 27 Page - Microchip Technology |
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UPD301B Datasheet(HTML) 27 Page - Microchip Technology |
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27 / 45 page ![]() 2020 Microchip Technology Inc. DS00003412A-page 27 UPD301B/C The VBUS Match Register (VBUS_MATCH) indicates when the value on VBUS_DET_IN is higher than the correspond- ing programmed threshold and can therefore be used to determine if VBUS is in the desired range. A change in the state of the VBUS match may trigger assertion of the IRQ_N pin if appropriately configured. 4.4 Baseband CC Interface (BCI) The device integrates a Baseband CC Interface (BCI) to facilitate USB Power Delivery communication. This module bridges between the PD MAC/BMC and the analog front end. Baseband communication is initiated by the PD MAC, which interfaces to the BCI. The BCI implements the digital functions required to control TX baseband components. 4.4.1 BASEBAND TX DATA-FLOW The key responsibility of the BCI is to generate the wave form required for baseband communication. To this end, the BMC has a group of eight registers that define the Lo-Hi and Hi-Lo transitions for the generated BMC signal. When instructed to transition from Lo-Hi, the BCI steps through all BB TX Rise Registers. Likewise when instructed to transition from Hi-Lo, the BCI steps through all BB TX Fall Registers APPLICATION NOTE: The user may replicate values if it is desired to use less than twelve unique values for this purpose. 4.4.2 BASEBAND RX DATA-FLOW Baseband RX data is received by the BCI from the RX analog front end where it is compared to a threshold programmed by software. The CC RX DAC Value defines the trip point used for reception of baseband data. The field shall be pro- grammed to be 175 mV below the RX Eye center, as defined in the PD Specification for the mode in which the device is operating (Sourcing Power, Sinking Power, Power Neutral). 4.5 Power Delivery MAC The PD MAC implements certain features of the protocol layer and physical layer of the Universal Serial Bus Power Delivery Specification. On one end the PD MAC interfaces to the software implementing the bulk of protocol and higher level layers and on the other end it interfaces to a BMC encoder / decoder module. In addition to the normal TX and RX functions, the PD MAC implements the test mode logic defined in the USB PD specification (BIST). The PD MAC supports the following features: • Automatic TX Mode for packet framing and CRC32 insertion. • Raw TX Mode for bit level packet control. • Automatic GoodCRC response to received messages. • Automatic BIST Error Count Message in BIST RX Mode. • GoodCRCTimer implementation. • Automatic retries with programmable retry count. • Redundant receive packets automatically dropped in auto response mode. • 74 byte TX queue. • 128 byte RX queue. • Programmable TX Bit-time. Allows for changing operating frequency. • Programmable preamble length. • BIST TX and RX logic. • Programmable TX and RX queue modes - buffer mode and FIFO mode. • CRC32 generator for TX. • CRC32 calculator and comparator for RX. |
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