ADPD105BCPZ datasheet(46/66 Pages) AD

46 / 66 page

ADPD105/ADPD106/ADPD107

Data Sheet

Rev. A | Page 46 of 66

The circuit shown in Figure 50 shows a synchronous ECG and

PPG measurement using the AD8233 and the ADPD105. The

AD8233 implements a two-pole high-pass filter with a cutoff

frequency at 0.3 Hz, and a two-pole low-pass filter with a cutoff

frequency of 37 Hz. The output of the AD8233 is fed to one of

the current inputs of the ADPD105 through a 50 kΩ resistor to

convert the voltage output of the AD8233 into a current.

The ADPD105 is configured to alternately measure the

photodiode signal and the ECG signal from the AD8233 on

consecutive timeslots to provide fully synchronized PPG and

ECG measurements. Data can be read out of the on-chip FIFO

or straight from data registers. The ADPD105 channel used to

process the ECG signal is set up in TIA ADC mode and the input

bias voltage must be set to the 0.90 V setting using Bits[5:4] of

on Time Slot B. The TIA gain setting can be set to optimize the

dynamic range of the signal path. The channel used to process

the PPG signal is configured in its normal operating mode.

Figure 51 shows a plot of a synchronized ECG and PPG

measurement using the AD8233 with the ADPD105.

1.8V

+IN

–IN

HPDRIVE

+VS

HPSENSE

IAOUT

REFIN

GND

AC/DC

SDN

LOD

RLD

RLDFB

OUT

OPAMP+

OPAMP–

REFOUT

AD8233

6.8nF

1MΩ

250kΩ

2.7nF

100kΩ

180kΩ

1MΩ

10MΩ

0.1µF

10MΩ

1nF

10MΩ

0.1µF

360kΩ

4.7µF

TO DIGITAL

INTERFACE

4.7µF

RLD SDN

1.8V

50kΩ

PD3-4

PD1-2

PDC

LEDX1

VLED

VREF

1µF

AGND

DGND

LGND

0.1µF

DVDD

AVDD

1.8V

10kΩ 10kΩ

1.8V

SCL

SDA

GPIO0

GPIO1

TO DIGITAL

INTERFACE

ADPD105

Figure 50. Synchronized PPG and ECG Measurement Using ADPD105 with the AD8233

6000

6500

7000

7500

8000

8500

9000

9500

10000

50000

50500

51000

51500

52000

PPG

ECG

SAMPLE RATE (ms)

Figure 51. Plot of Synchronized ECG and PPG Waveforms

ADPD105BCPZ Datasheet(PDF) 46 Page - Analog Devices

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