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ADPD105BCPZ Datasheet(PDF) 5 Page - Analog Devices |
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ADPD105BCPZ Datasheet(HTML) 5 Page - Analog Devices |
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5 / 66 page  Data Sheet ADPD105/ADPD106/ADPD107 Rev. A | Page 5 of 66 LED3 DRIVER LED2 DRIVER ANALOG BLOCK TIME SLOT A DATA TIME SLOT B DATA DIGITAL DATAPATH AND INTERFACE CONTROL LED3 LEVEL AND TIMING CONTROL LED2 LEVEL AND TIMING CONTROL LED1 DRIVER LED1 LEVEL AND TIMING CONTROL GPIO0 AGND VREF 1µF AVDD DVDD DGND ADPD105 LFCSP 14-BIT ADC TIA TIA TIA TIA AFE: SIGNAL CONDITIONING AFE: SIGNAL CONDITIONING AFE: SIGNAL CONDITIONING AFE: SIGNAL CONDITIONING PDC TIME SLOT SWITCH PD1 PD8 PD5 PD2 PD6 PD3 PD7 PD4 LEDX1 LEDX2 LEDX3 LGND VLED GPIO1 LED1 LED2 LED3 VBIAS BPF ±1 INTEGRATOR VBIAS BPF ±1 INTEGRATOR VBIAS BPF ±1 INTEGRATOR VBIAS BPF ±1 INTEGRATOR B A SLOT SELECT AFE CONFIGURATION SDA SCL Figure 2. Block Diagram for ADPD105 LFCSP Version |
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