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ADPD1081 Datasheet(PDF) 12 Page - Analog Devices |
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ADPD1081 Datasheet(HTML) 12 Page - Analog Devices |
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12 / 74 page  ADPD1080/ADPD1081 Data Sheet Rev. C | Page 12 of 74 SPI Timing Specifications DVDD = 1.7 V to 1.9 V, TA = −40°C to +85°C, unless otherwise noted. Table 7. Parameter Symbol Test Conditions/Comments Min Typ Max Unit SPI PORT SPI Port available on ADPD1081 only SCLK Frequency fSCLK 10 MHz Minimum Pulse Width High tSCLKPWH 20 ns Low tSCLKPWL 20 ns CS Setup Time t CSS CS setup to SCLK rising edge 10 ns Hold Time t CSH CS hold from SCLK rising edge 10 ns Pulse Width High t CSPWH CS pulse width high 10 ns MOSI Setup Time tMOSIS MOSI setup to SCLK rising edge 10 ns Hold Time tMOSIH MOSI hold from SCLK rising edge 10 ns MISO Output Delay tMISOD MISO valid output delay from SCLK falling edge 21 ns SPI Timing Diagram CS tCSS tMOSIS tMOSIH tMISOD tSCLKPWH tSCLKPWL tCSH tCSPWH SCLK MISO MOSI Figure 4. SPI Timing Diagram |
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