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ADGS1408/ADGS1409

Data Sheet

Rev. 0 | Page 28 of 34

APPLICATIONS INFORMATION

DIGITAL INPUT BUFFERS

There are input buffers present on the digital input pins (CS,

SCLK, and SDI). These buffers are active at all times; as a result,

there is current drawn from the VL supply if SCLK or SDI are

toggling, regardless of whether CS is active. For typical values of

this current draw, refer to the Specifications section and Figure 30.

POWER SUPPLY RAILS

To guarantee correct operation of the ADGS1408/ADGS1409,

0.1 μF decoupling capacitors are required.

The ADGS1408/ADGS1409 can operate with bipolar supplies

between ±4.5 V and ±16.5 V. The supplies on VDD and VSS do

not need to be symmetrical; however, the VDD to VSS range must

not exceed 33 V. The ADGS1408/ADGS1409 can also operate

with single supplies between 5 V and 20 V with VSS connected

to GND.

The voltage range that can be supplied to VL is from 2.7 V to 5.5 V.

The device is fully specified at ±15 V, ±5 V, and +12 V analog

supply voltage ranges.

POWER SUPPLY RECOMMENDATIONS

Analog Devices has a wide range of power management products

to meet the requirements of most high performance signal chains.

An example of a bipolar power solution is shown in Figure 54.

The ADP5070 dual switching regulator generates a positive and

negative supply rail for the ADGS1408/ADGS1409, an amplifier,

and/or a precision converter in a typical signal chain. Also

shown in Figure 54 are two optional low dropout regulators

(LDOs), ADP7118 and ADP7182 (positive and negative LDOs,

respectively), that can be used to reduce the output ripple of

the ADP5070 in ultralow noise sensitive applications.

The ADM7160 can be used to generate the VL voltage required

to power digital circuitry within the ADGS1408/ADGS1409.

ADM7160

LDO

+3.3V

ADP7118

LDO

+15V

ADP7182

LDO

–15V

+16.5V

–16.5V

ADP5070

+5V

INPUT

Figure 54. Bipolar Power Solution

Table 11. Recommended Power Management Devices

Product

Description

ADP5070

1 A/0.6 A, dc-to-dc switching regulator with

independent positive and negative outputs

ADM7160

5.5 V, 200 mA, ultralow noise, linear regulator

ADP7118

20 V, 200 mA, low noise, CMOS LDO linear regulator

ADP7182

−28 V, −200 mA, low noise, LDO linear regulator

POWER SUPPLY SEQUENCING

Take care to ensure correct power supply sequencing. Incorrect

power supply sequencing can result in the device being subjected to

stresses beyond the maximum ratings listed in Table 7. Ensure

that the analog power supplies (VDD and VSS) and ground (GND)

are present before applying VL, the digital inputs, and the analog

inputs. Failure to adhere to this sequence may result in damage

to the device.

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