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STEF12H60M Datasheet(PDF) 3 Page - STMicroelectronics |
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STEF12H60M Datasheet(HTML) 3 Page - STMicroelectronics |
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3 / 34 page ![]() 2 Pin configuration Figure 2. Pin connection (top view) EXPOSED PAD (VIN ) 24 23 22 21 20 19 18 17 VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT NC NC (reserved) D_OC ON/PD GOK NC (reserved) VINF NC (reserved) VIN VIN VIN VIN VIN VIN VIN VIN Gate VTEMP SS GND VDD IMON CS CLREF Table 1. Pin description Pin # Symbol Function 25 - 32 VOUT Output voltage of the eFuse. All pins must be connected together on the PCB 3 D_OC Output pin, driven low if the current set-point is exceeded. It is a 5 V compliant open drain output 4 ON / PD Enable/disable pin. This pin is internally pulled up. Pull this pin below the relevant threshold to shut down the chip. Pull it above threshold to enable the chip. This pin also commands the output pull-down resistance. A capacitor connected between this pin and GND can be used to increase the delay during startup 5 GOK Gate-OK output pin. It signals that a shutdown, which was not commanded by the enable pin, has happened. 5 V compliant open drain output, low when device is in a fault condition 1 NC Not internally connected. It can be connected to any voltage 6, 8 NC/reserved These pins are reserved and must be left floating 2 NC/reserved This pin is reserved. If necessary, it can be connected to any voltage up to VIN 7 VINF Input voltage for internal circuits. It is connected to VIN through an R-C filter 9 - 16 VIN Input voltage of the eFuse. All these pins must be connected together and to the exposed pad 17 Gate Gate pin of the internal MOSFET. This pin must be left floating or it can be bypassed to GND through an external R-C filter, to minimize the risk of oscillation in case of very small COUT or high input / output inductance 18 VTEMP Temperature monitor pin. Bypass to GND with 0.1 μF capacitor STEF12H60M Pin configuration DS13608 - Rev 3 page 3/34 |
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