ADRF6821 datasheet(56/61 Pages) AD

Part #	ADRF6821

Description	450 MHz to 2800 MHz, DPD RFIC with Integrated Fractional-N PLL and VCO

PDF	61 Pages

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Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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56 / 61 page

ADRF6821

Data Sheet

Rev. A | Page 56 of 61

Address: 0x1401, Reset: 0x00, Name: MULTI_FUNC_CTRL

SPI Supply Control

1: 3.3V Read Back.

0: 1.8V Read Back.

[7:5] RESERVED

[3:0] RESERVED

[4] SPI_1P8_3P3_CTRL (R/W)

Table 78. Bit Descriptions for MULTI_FUNC_CTRL

Bits

Bit Name

Settings

Description

Reset

Access

[7:5]

RESERVED

Reserved

0x0

SPI_1P8_3P3_CTRL

SPI Supply Control

0x0

R/W

1.8 V Read Back

3.3 V Read Back

[3:0]

RESERVED

Reserved

0x0

Address: 0x140E, Reset: 0xB3, Name: LO_CNTRL2

Enable the Res is tor Bias

Reference Buffer Enable

[7] EN_BIAS_R (R/W)

[4:0] RESERVED

[6] RESERVED

[5] REFBUF_EN (R/W)

Table 79. Bit Descriptions for LO_CNTRL2

Bits

Bit Name

Settings

Description

Reset

Access

EN_BIAS_R

Enable the Resistor Bias. Selects the resistor bias instead of the band gap based bias

for the LO path.

0x1

R/W

RESERVED

Reserved.

0x0

R/W

REFBUF_EN

Reference Buffer Enable.

0x1

R/W

[4:0]

RESERVED

Reserved.

0x13

R/W

ADRF6821 Datasheet(PDF) 56 Page - Analog Devices

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