ADRF6821 datasheet(27/61 Pages) AD

27 / 61 page

Data Sheet

ADRF6821

Rev. A | Page 27 of 61

Pin No.

Mnemonic

Description

Basic Connection

the resistor.

SPILDO_OUT_1V8

SPI 1.8 V LDO external

decouple output

Decouple these pins to ground using 100 pF and

0.1 µF capacitors. Place the decoupling capacitors

close to the pins.

SDMLDO_OUT_1V8

SDM 1.8 V LDO external

decouple output

Auxiliary LO Output

38, 39

LO_OUT+, LO_OUT−

LO outputs

The differential output impedance of the buffer of

the LO outputs is 50 Ω.

External LO Inputs

31, 32

EXT_LO_IN+,

EXT_LO_IN−

External LO inputs

The differential input impedance of the buffer of

the external LO inputs is 100 Ω.

Serial Peripheral Interface

SCLK

SPI clock

1.8 V and 3.3 V compatible logic levels.

SDIO

SPI data input/output in 3-wire

mode and SPI data input in

for 4-wire mode

1.8 V and 3.3 V compatible logic levels.

SDO

SPI data output for 4-wire

mode and this pin is not used

for 3-wire mode

1.8 V and 3.3 V compatible logic levels.

SPI chip select

Active low; 1.8 V and 3.3 V compatible logic levels

Reset

RST

Reset

Active low; 1.8 V and 3.3 V compatible logic levels

Ground

3, 5, 12, 16, 19, 52, 55

GND

Ground

Connect these pins to the ground of the PCB.

GND

Charge pump ground

Do not connect this pin to the paddle ground,

connect this pin to the PCB ground.

Exposed Pad

EPAD

Exposed Pad

The exposed pad is on the bottom of the package.

The exposed pad must be soldered to ground.

ADRF6821 Datasheet(PDF) 27 Page - Analog Devices

ADRF6821 Datasheet(HTML) 27 Page - Analog Devices

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