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ADRV9002BBCZ Datasheet(PDF) 12 Page - Analog Devices |
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ADRV9002BBCZ Datasheet(HTML) 12 Page - Analog Devices |
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12 / 92 page  Data Sheet ADRV9002 SPECIFICATIONS analog.com Rev. 0 | 12 of 92 Table 2. Receivers (Rx1A, Rx1B, Rx2A, and Rx2B) Parameter Symbol Min Typ Max Unit Test Conditions/Comments 470 MHz 97 dB 900 MHz 90 dB 2400 MHz 86 dB 3500 MHz 84 dB 5800 MHz 70 dB 1 Note that the input signal power limit does not correspond to 0 dBFS at the digital output because of the nature of the continuous time Σ-Δ ADCs. Unlike the hard clipping characteristic of pipeline ADCs, these converters exhibit a soft overload behavior when the input approaches the maximum level. INTERNAL LO, EXTERNAL LO, AND DEVICE CLOCK Table 3. Parameter Symbol Min Typ Max Unit Test Conditions/Comments LO Frequency Step 4.5 Hz For 38.4 MHz DEV_CLK, use the equation DEV_CLK/223 − 15 to calculate Reference Spurs −80 dBc LO < 1 GHz, PLL bandwidth = 300 kHz LO WITH HIGH PERFORMANCE MODE Integrated Phase Noise Integrated from 100 Hz to 50 MHz 30 MHz LO 0.008 °rms PLL bandwidth = 300 kHz 470 MHz LO 0.04 °rms PLL bandwidth = 300 kHz 900 MHz LO 0.08 °rms PLL bandwidth = 300 kHz 2400 MHz LO 0.22 °rms PLL bandwidth = 300 kHz 3500 MHz LO 0.27 °rms PLL bandwidth = 300 kHz 5800 MHz LO 0.6 °rms PLL bandwidth = 300 kHz Phase Noise DEV_CLK = 38.4 MHz, typical performance 30 MHz LO See Figure 292 PLL bandwidth = 300 kHz 470 MHz LO See Figure 293 PLL bandwidth = 300 kHz 900 MHz LO See Figure 294 PLL bandwidth = 300 kHz 2400 MHz LO See Figure 295 PLL bandwidth = 300 kHz 3500 MHz LO See Figure 296 PLL bandwidth = 300 kHz 5800 MHz LO See Figure 297 PLL bandwidth = 300 kHz LO PHASE SYNCHRONIZATION Initial Phase Synchronization Accuracy 3 Degrees EXTERNAL LO INPUT Input Frequency Input frequency must be 2× or higher than the desired frequency for the LO frequency (fLO), a 1× multiplier is available for an LO range from 500 MHz to 1 GHz fEXTLO 60 12000 MHz Input Signal Power −6 0 +6 dBm 50 Ω matching at the source Input Signal Differential Phase Balance 20 Degrees Do not exceed 20 degrees to ensure adequate quadrature error correction Input Signal Differential Amplitude Balance 1 dB Input Signal Duty Cycle 2.5 % Input Impedance 100 Ω Differential, see the ADRV9001 system development user guide for more information |
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