Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

Preview PDF HTML

STM32H723VG Datasheet(PDF) 181 Page - STMicroelectronics

Part # STM32H723VG
Description  32-bit Arm® Cortex®-M7 550 MHz MCU, up to 1 MB Flash memory, 564 KB RAM, 35 comms peripherals and analog interfaces
PDF  227 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H723VG Datasheet(HTML) 181 Page - STMicroelectronics

Back Button STM32H723VG Datasheet HTML 177Page - STMicroelectronics STM32H723VG Datasheet HTML 178Page - STMicroelectronics STM32H723VG Datasheet HTML 179Page - STMicroelectronics STM32H723VG Datasheet HTML 180Page - STMicroelectronics STM32H723VG Datasheet HTML 181Page - STMicroelectronics STM32H723VG Datasheet HTML 182Page - STMicroelectronics STM32H723VG Datasheet HTML 183Page - STMicroelectronics STM32H723VG Datasheet HTML 184Page - STMicroelectronics STM32H723VG Datasheet HTML 185Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 181 / 227 page
background image
DS13313 Rev 2
181/227
STM32H723xE/G
Electrical characteristics
208
6.3.31
Digital filter for Sigma-Delta Modulators (DFSDM) characteristics
Unless otherwise specified, the parameters given in Table 97 for DFSDM are derived from
tests performed under the ambient temperature, fPCLKx frequency and supply voltage
conditions summarized in Table 12: General operating conditions.
•
Output speed is set to OSPEEDRy[1:0] = 10
•
Capacitive load CL = 30 pF
•
Measurement points are done at CMOS levels: 0.5VDD
•
VOS level set to VOS0
Refer to Section 6.3.16: I/O port characteristics for more details on the input/output alternate
function characteristics (DìFSDM_CKINx, DFSDM_DATINx, DFSDM_CKOUT for DFSDM).
Table 97. DFSDM measured timing
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fDFSDMCLK
DFSDM
clock
1.62 < VDD < 3.6 V
-
-
fSYSCLK
MHz
fCKIN
(1/TCKIN)
Input clock
frequency
SPI mode
(SITP[1:0] = 0,1),
External clock mode
(SPICKSEL[1:0] = 0)
--
20
SPI mode
(SITP[1:0] = 0,1),
Internal clock mode
(SPICKSEL[1:0] # 0)
--
20
fCKOUT
Output clock
frequency
1.62 < VDD < 3.6 V
-
-
20
DuCyCKOUT
Output clock
frequency
duty cycle
1.62 < VDD
< 3.6 V
Even
division,
CKOUTDIV
= n, 1, 3, 5..
45
50
55
%
Odd
division,
CKOUTDIV
= n, 2, 4, 6..
(((n/2+1)/(n+1))
*100)−5
(((n/2+1)/(n+1))
*100)
(((n/2+1)/(n+1))
*100)+5



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com