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STM32H723VG Datasheet(PDF) 182 Page - STMicroelectronics |
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STM32H723VG Datasheet(HTML) 182 Page - STMicroelectronics |
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182 / 227 page ![]() Electrical characteristics STM32H723xE/G 182/227 DS13313 Rev 2 twh(CKIN) twl(CKIN) Input clock high and low time SPI mode (SITP[1:0] = 0,1), External clock mode (SPICKSEL[1:0] = 0) TCKIN/2−0.5 TCKIN/2 - ns tsu Data input setup time SPI mode (SITP[1:0] = 0,1), External clock mode (SPICKSEL[1:0] = 0) 2- - th Data input hold time SPI mode (SITP[1:0] = 0,1), External clock mode (SPICKSEL[1:0] = 0) 1- - TManchester Manchester data period (recovered clock period) Manchester mode (SITP[1:0] = 2,3), Internal clock mode (SPICKSEL[1:0] # 0) (CKOUTDIV+1) * TDFSDMCLK - (2*CKOUTDIV) * TDFSDMCLK Table 97. DFSDM measured timing (continued) Symbol Parameter Conditions Min Typ Max Unit |
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