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FSL518APG Datasheet(PDF) 6 Page - ON Semiconductor

Part # FSL518APG
Description  High Performance Switcher Integrated with HV Startup and SENSEFET
PDF  27 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

FSL518APG Datasheet(HTML) 6 Page - ON Semiconductor

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FSL518H, FSL538H, FSL518A, FSL538A
www.onsemi.com
6
ELECTRICAL CHARACTERISTICS (continued)
TJ = −40 to +125°C and VCC = 14 V unless otherwise specified.
Parameter
Unit
Max
Typ
Min
Symbol
Test Conditions
Control Section
Maximum Duty Ratio
VCOMP = 3.6 V
DMAX
68
75
82
%
COMP Output High Voltage
COMP−pin Open
VCOMP-
OPEN
5
V
COMP Sourcing Current
ICOMP
70
100
135
mA
Transconductance of Internal Error
Amplifier
GM
300
mS
Current-sourcing capability of Internal
Error Amplifier
VFB = VREF − 1 V
IGM-SOURCE
55
90
125
mA
Current-sinking capability of Internal
Error Amplifier
VFB = VREF + 1 V
IGM-SINK
−55
−90
−125
mA
Reference Voltage to Regulate FB-pin
Voltage
VREF
2.45
2.5
2.55
V
Leading-edge Blanking Time of Internal
SENSEFET Current Signal (Note 9)
tLEB
250
ns
Propagation Delay of Turning-off Power
MOSFET (Note 9)
tPD
100
ns
LINE Section
Threshold Voltage for Line Detection
Enable
VLINE > VLINE-DET
VLINE-DET
0.15
V
Threshold Voltage for Line Detection
Disable
VLINE < VLINE-ADJ
VLINE-ADJ
0.05
V
Burst-mode Level Setting Time when Line
Detection is Enabled (Note 9)
tSET
100
ms
Sourcing Current for Detecting Burst
Setting Zener Voltage in tSET
During tSET, VCC = 15 V, VLINE = 10 V
ISET
1.6
2.7
3.8
mA
Burst-mode Level 0 Set up Voltage
During tSET
VLINE-SET0
12.4
V
Burst-mode Level 1 Set up Voltage
During tSET
VLINE-SET1
9.3
10.6
V
Burst-mode Level 2 Set up Voltage
During tSET
VLINE-SET2
7.9
V
Sourcing Current for Setting Burst-mode
Level when Line Detection is Disabled
VLINE = 0 V before VCC is charged to
VCC-START
IBURST
9.4
10
10.6
mA
LINE-pin Voltage to Burst-mode Level
Attenuation when Line Detection is
Disabled (Note 9)
AV-BURST
1/3
V/V
Protections: Over-Voltage Protection (OVP)
Over-Voltage Protection Threshold Voltage
for VCC−pin
VCC-OVP
23.0
24.5
26.0
V
Delay time for OVP (Note 9)
tD-OVP
6.0
ms
Protections: Over-Load Protection (OLP)
OLP-Triggering Threshold Voltage on
COMP−pin
VOLP
3.3
3.6
3.9
V
Delay Time for OLP
VCOMP > VOLP after Soft-start Time
tD-OLP
30
60
90
ms



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