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PIMXRT516SCVM2A Datasheet(PDF) 60 Page - NXP Semiconductors |
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PIMXRT516SCVM2A Datasheet(HTML) 60 Page - NXP Semiconductors |
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60 / 124 page ![]() i.MX RT1160 Crossover Processors Data Sheet for Consumer Products, Rev. 0, 04/2021 60 NXP Semiconductors Electrical characteristics Figure 19. FlexSPI input timing in SDR mode where FlexSPIn_MCR0[RXCLKSRC] = 0X0, 0X1 NOTE Timing shown is based on the memory generating read data on the SCK falling edge, and FlexSPI controller sampling read data on the falling edge. 4.5.2.1.2 SDR mode with FlexSPIn_MCR0[RXCLKSRC] = 0x3 There are two cases when the memory provides both read data and the read strobe in SDR mode: • A1—Memory generates both read data and read strobe on SCK rising edge (or falling edge) • A2—Memory generates read data on SCK falling edge and generates read strobe on SCK rising edge Figure 20. FlexSPI input timing in SDR mode where FlexSPIn_MCR0[RXCLKSRC] = 0X3 (case A1) Table 52. FlexSPI input timing in SDR mode where FlexSPIn_MCR0[RXCLKSRC] = 0x3 (case A1) Symbol Parameter Value Unit Min Max Frequency of operation — 166 MHz TSCKD - TSCKDQS Time delta between TSCKD and TSCKDQS -2 2 ns TIS TIH SCK SIO[0:7] TIS TIH Internal Sample Clock TSCKDQS SCK SIO[0:7] DQS TSCKD TSCKDQS TSCKD |
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