PIMXRT516SCVM2A datasheet(89/124 Pages) NXP

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Electrical characteristics

i.MX RT1160 Crossover Processors Data Sheet for Consumer Products, Rev. 0, 04/2021

NXP Semiconductors

4.9.3.5

HS400 specifications - eMMC 5.0 only

Be aware that only data are sampled on both edges of the clock (not applicable to CMD). The CMD

input/output timing for HS400 mode is the same as CMD input/output timing for HS200 mode. Check SD5

and SD8 parameters in the HS200 interface timing specifications table for CMD input/output timing of

HS400 mode.

Table 87 lists the HS400 timing characteristics.

Table 87. HS200 interface timing specification

Parameter

Symbols

Min

Max

Unit

Card Input Clock

SD1

Clock Frequency Period

tCLK

5.0

—

SD2

Clock Low Time

tCL

0.46 x tCLK

0.54 x tCLK

SD3

Clock High Time

tCH

0.46 x tCLK

0.54 x tCLK

uSDHC Output/Card Inputs SD_CMD, SDx_DATAx in HS200 (Reference to CLK)

SD5

uSDHC Output Delay

tOD

–1.6

0.74

uSDHC Input/Card Outputs SD_CMD, SDx_DATAx in HS200 (Reference to CLK)1

1HS200 is for 8 bits while SDR104 is for 4 bits.

SD8

Card Output Data Window

tODW

0.5 x tCLK

—ns

Table 88. HS400 interface timing specification

Symbol

Description

Min

Max

Unit

Operating voltage

1.71

1.95

Card input clock

Clock frequency

200

MHz

SD1

Clock period

5.0

—

SD2

Clock Low time

0.46 x SD1

0.54 x SD1

SD3

Clock High time

0.46 x SD1

0.54 x SD1

SDHC output / card Inputs SDHC_CMD, SDHC_Dn (reference to SDHC_CLK)

SD4

Output skew from data to edge of SCK

0.45

—

SD5

Output skew from edge of SCK to data

0.45

—

SDHC input / card outputs (reference to strobe)

SD6

SDHC input skew

—

0.45

SD7

SDHC hold skew

—

0.45

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