WM2130

Production Data

WOLFSON MICROELECTRONICS LTD

PD Rev 1.2 April 2001

8

DEVICE DESCRIPTION

INTRODUCTION

The WM2130 is a high speed analogue-to-digital converter (ADC) with on-chip sample and hold and

reference generation, designed for applications such as composite video digitisation, digital copiers

and and high speed data acquisition. The chip architecture consists of:

•

High bandwidth sample and hold input, which can operate in differential or single-

ended mode

•

10-bit, 30MSPS pipeline analogue-to-digital converter (ADC) core

•

On-chip reference generator and reference buffer (external references can also be

used for applications where common or high precision references are required)

•

10-bit parallel interface to read ADC conversion data. An out-of-range output pin

indicates when the input signal is outside the converter’s range (this is disabled in

AD876 compatible mode).

ANALOGUE SIGNAL PATH

The WM2130 analogue signal path consists of a DC clamp with a 10-bit clamp level DAC (discussed

under ‘DC Clamp’, below), a high-bandwidth sample and hold unit and a fast 10-bit pipelined

analogue to digital converter (ADC core).

SAMPLE

AND

HOLD

REFTS

REFBS

AIN

-1/2

+1

-1/2

REFTF

REFBF

ADC

CORE

VQ+

VQ-

Figure 5 Analogue Input Signal Flow

Figure 5 shows the signal flow through the sample and hold unit to the ADC core, where the process

of analogue to digital conversion is performed against the ADC reference voltages, REFTF and

REFBF (their generation from internal or external reference sources is described later).

SAMPLE AND HOLD

M

IN

Q

V

V

V

−

=

where

2

REFBS

REFTS

V

M

+

=

However, in differential mode (see ‘ADC Reference Modes’, below), REFTS and REFBS can be

connected together to operate with AIN as a complementary pair of differential inputs.