ACE25QC200GLFMLTH datasheet(38/64 Pages) ACE

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ACE25QC200GL

2M BIT SPI NOR FLASH

VER 1.1

Page Erase (81h/DBh)

The Page Erase (PE) instruction is for erasing the data of the chosen Page to be "1". A Write Enable

(WREN) instruction must execute to set the Write Enable Latch (WEL) bit before sending the Page Erase

(PE). To perform a Page Erase with the standard page size (256 bytes), an instruction code of 81h or DBh

must be clocked into the device followed by three address bytes comprised of 2 page address bytes that

specify the page in the main memory to be erased. And A7-A0 is an unrelated item.

The sequence of issuing PE instruction is: /CS goes low → sending PE instruction code→ 3-byte address

on SI → /CS goes high.

Sector Erase (20h)

The Sector Erase instruction sets all memory within a specified sector (4K-bytes) to the erased state of all

1s (FFh). A Write Enable instruction must be executed before the device will accept the Sector Erase

Instruction (Status Register bit WEL must equal 1). The instruction is initiated by driving the /CS pin low and

shifting the instruction code “20h” followed a 24-bit sector address. And the address A11-A0 is an unrelated

item and has no effect on the result of the instruction. The Sector Erase instruction sequence is shown in

Figure29.

The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not done the

Sector Erase instruction will not be executed. After /CS is driven high, the self-timed Sector Erase

instruction will commence for a time duration of tSE (See AC Characteristics). While the Sector Erase cycle

is in progress, the Read Status Register instruction may still be accessed for checking the status of the WIP

bit. The WIP bit is a 1 during the Sector Erase cycle and becomes a 0 when the cycle is finished and the

device is ready to accept other instructions again. After the Sector Erase cycle has finished the Write

Enable Latch (WEL) bit in the Status Register is cleared to 0. The Sector Erase instruction will not be

executed if the addressed page is protected by the Block Protect (BP4, BP3, BP2, BP1, and BP0) bits.

Figure28. Page Erase Instruction

Figure29. Sector Erase Instruction

ACE25QC200GLFMLTH Datasheet(PDF) 38 Page - ACE Technology Co., LTD.