| Electronic Components Datasheet Search |
|
ACE25QC200GLFMLTH Datasheet(PDF) 11 Page - ACE Technology Co., LTD. |
|
|
|||||||||||||||||||||||||||||
ACE25QC200GLFMLTH Datasheet(HTML) 11 Page - ACE Technology Co., LTD. |
|
11 / 64 page ![]() ACE25QC200GL 2M BIT SPI NOR FLASH VER 1.1 11 (B) WEL bit The Write Enable Latch bit indicates the status of the internal Write Enable Latch. When WEL bit is set to 1 the internal Write Enable Latch is set, when WEL bit is cleared to 0 the internal Write Enable Latch is reset and no Write Status Register, Program or Erase instruction is accepted. (C) BP4, BP3, BP2, BP1, BP0 bits The Block Protect (BP4, BP3, BP2, BP1, BP0) bits are non-volatile. They define the size of the area to be software protected against Program and Erase instructions. These bits are written with the Write Status Register instruction. When the Block Protect (BP4, BP3, BP2, BP1, BP0) bits are set to 1, the relevant memory (as defined in Table 4 and Table 5) are became protected against Page Program, Page Erase, Sector Erase and Block Erase instructions. The Block Protect (BP4, BP3, BP2, BP1, BP0) bits can be written provided that the Hardware Protected mode has not been set. The Chip Erase instruction is executed. If the Block Protect (BP2, BP1, and BP0) bits are 0 and CMP=0 or the Block Protect (BP2, BP1 and BP0) bits are 1and CMP=1. (D) RP1, SRP0 bits The Status Register Protect (SRP1 and SRP0) bits are non-volatile Read/Write bits in the status register. The SRP bits control the method of write protection: software protection, hardware protection, power supply lock-down or one time programmable protection. Table4. ACE25QC200GL Status Register protect table SRP1 SRP0 /WP Status Register Description 0 0 X Software Protected The Status Register can be written to after a Write Enable instruction, WEL=1.(Factory Default) 0 1 0 Hardware Protected /WP=0, the Status Register locked and cannot be written. 0 1 1 Hardware Unprotected /WP=1, the Status Register is unlocked and can be written to after a Write Enable instruction, WEL=1. 1 0 X Power Supply Lock-Down (1) Status Register is protected and cannot be written to again until the next Power-Down, Power-Up cycle. 1 1 X One Time Program (2) Status Register is permanently protected and cannot be written to. Notes: 1. When SRP1, SRP0= (1, 0), a Power-Down, Power-Up cycle will change SRP1, SRP0 to (0, 0) state. 2. The One time Program feature is available upon special order. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |