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LPC47N237-MD Datasheet(PDF) 71 Page - SMSC Corporation |
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LPC47N237-MD Datasheet(HTML) 71 Page - SMSC Corporation |
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71 / 138 page ![]() 3.3v I/O Controller for Port Replicators and Docking Stations SMSC DS – LPC47N237 Page 71 Revision 0.3 (10-26-04) DATASHEET 11.1.7 Reset and Initialization The SER_IRQ bus uses nPCI_RESET as its reset signal. The SER_IRQ pin is tri-stated by all agents while nPCI_RESET is active. With reset, SER_IRQ Slaves are put into the (continuous) IDLE mode. The Host Controller is responsible for starting the initial SER_IRQ Cycle to collect system’s IRQ/Data default values. The system then follows with the Continuous/Quiet mode protocol (Stop Frame pulse width) for subsequent SER_IRQ Cycles. It is Host Controller’s responsibility to provide the default values to 8259’s and other system logic before the first SER_IRQ Cycle is performed. For SER_IRQ system suspend, insertion, or removal application, the Host controller should be programmed into Continuous (IDLE) mode first. This is to guarantee SER_IRQ bus is in IDLE state before the system configuration changes. |
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