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MPC8560CPX667JC Datasheet(PDF) 34 Page - NXP Semiconductors |
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MPC8560CPX667JC Datasheet(HTML) 34 Page - NXP Semiconductors |
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34 / 108 page ![]() MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2 34 Freescale Semiconductor Local Bus Figure 15 shows the MII management AC timing diagram. Figure 15. MII Management Interface Timing Diagram 8 Local Bus This section describes the DC and AC electrical specifications for the local bus interface of the MPC8560. 8.1 Local Bus DC Electrical Characteristics Table 30 provides the DC electrical characteristics for the local bus interface. 8.2 Local Bus AC Electrical Specifications Table 31 describes the general timing parameters of the local bus interface of the MPC8560 with the DLL enabled. Table 30. Local Bus DC Electrical Characteristics Parameter Symbol Min Max Unit High-level input voltage VIH 2OVDD + 0.3 V Low-level input voltage VIL –0.3 0.8 V Input current (VIN 1 = 0 V or V IN = VDD)IIN —±5 μA High-level output voltage (OVDD = min, IOH = –2 mA) VOH OVDD - 0.2 — V Low-level output voltage (OVDD = min, IOL = 2 mA) VOL —0.2 V Note: 1.Note that the symbol VIN, in this case, represents the OVIN symbol referenced in Table 1 and Table 2. Table 31. Local Bus General Timing Parameters—DLL Enabled Parameter POR Configuration Symbol 1 Min Max Unit Notes Local bus cycle time — tLBK 6.0 — ns 2 LCLK[n] skew to LCLK[m] or LSYNC_OUT — tLBKSKEW — 150 ps 3, 9 MDC tMDDXKH tMDC tMDCH tMDCR tMDCF tMDDVKH tMDKHDX MDIO MDIO (Input) (Output) tMDKHDV |
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