This features has the following system level benefits:

• Protects the system from damage.

• Prevents data from being transmitted unintentionally.

• Eliminates the need for power sequencing solutions, reducing BOM count and cost, simplifying system

design, and improving reliability.

8.3.4 Low Power Disable Mode

The TMUX646 has a low power mode that places all the signal paths in a high impedance state and lowers the

current consumption while the device is not in use. To put the device in low power mode and disable the switch,

the output enable pin OE must be supplied with a logic high signal.

8.4 Device Functional Modes

8.4.1 Pin Functions

The SEL and OE pins have a weak 6-MΩ pull-down to prevent floating input logic.

Table 8-1. Function Table

OE

SEL

Function

H

X

I/O pins High-Impedance

L

L

CLK(P/N) = CLKA(P/N)

Dn(P/N) = DAn(P/N)

L

H

CLK(P/N) = CLKB(P/N)

Dn(P/N) = DBn(P/N)

8.4.2 Low Power Disable Mode

While the output enable pin OE is supplied with a logic high, the device remains in the low power disabled

state. This reduces the current consumption substantially and the switches are high impedance. The SEL pin is

ignored while the OE remains high. Upon exiting low power mode, the switch status reflects the SEL pin as seen

in Table 8-1.

8.4.3 Switch Enabled Mode

While the output enable pin OE is supplied with a logic low, the device remains in switch enabled mode.

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TMUX646

SCDS432 – JUNE 2021

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