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ZL40272 Datasheet(PDF) 21 Page - Microchip Technology

Part # ZL40272
Description  Low-Skew, Low Additive Jitter, 12 Output HCSL/LVDS/ LVPECL Fanout Buffer with Per-Output Enable Control
PDF  54 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

ZL40272 Datasheet(HTML) 21 Page - Microchip Technology

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2020 - 2021 Microchip Technology Inc. and its subsidiaries
DS20006408B-page 21
ZL40272
3.0
REGISTER MAP
The device is controlled by accessing registers through the serial interface. The following table provides a summary of
the registers available for the configuration of the device. The default settings can be modified via factory programmable
OTP memory.
TABLE 3-1:
REGISTER MAP
Address
I2C A[6:0]
Hex (0x)
Name
Data D[7:0]
00
XTALBG
xtal_buf_gain[7:0]
01
XTALDL
xtal_drive_level[7:0]
02
XTALLC
xtal_load_cap[7:0]
03
XTALNR
xtal_normal_run
04
OUTLOWALL
out_low_all
05
INSEL
input_select[1:0]
06
—
Not used.
07
DRVTYPE0
driver_type[7:0] (differential output OUT3, OUT2, OUT1, OUT0)
08
DRVTYPE1
driver_type[15:8] (differential output OUT7, OUT6, OUT5, OUT4)
09
DRVTYPE2
driver_type[23:16] (differential output OUT11, OUT10, OUT9, OUT8)
0A
OUTLOW0
output_drive_low[7:0]
0B
OUTLOW1
output_drive_low[11:8]
0C
COMMODSEL
vcm_sel
0D
—
Not used.
0E
DEVADDR
dev_addr[2:0]
0F
Reserved
Reserved
10
Reserved
Reserved
11
DEVICEID
Device Identification
12-1F
Reserved
Reserved
TABLE 3-2:
0X00 XTALBG - XTAL BUFFER GAIN
Bit
Name
Description
Type
Reset
7:0
xtal_buf_gain[7:0]
Programs crystal buffer (inverting amplifier) gain.
Every bit pair (bits: 01, 23, 45, 67) of this register corre-
spond to additional equal gain block which can be added
(bits set) or removed (bits cleared).
Minimum gain is 0x00 (default) and 0xFF is maximum
gain
When reference input mode is “bypass XTAL mode” or
“differential input modes” with HIGH xtal_normal_run bit,
the buffer is disabled and follows “Input Selection”.
When xtal_normal_run bit is LOW, XTAL buffer is in the
“xtal forced run” mode and keep running.
8’b0000_0000: default crystal buffer strength.
8’b0000_0011: enable additional buffer strength
8’b0000_1100: enable additional buffer strength
8’b0011_0000: enable additional buffer strength
8’b1100_0000: enable additional buffer strength
RW
FF



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