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STM32WB55CC Datasheet(PDF) 49 Page - STMicroelectronics

Part # STM32WB55CC
Description  Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M4 with FPU, Bluetooth® 5.2 and 802.15.4 radio solution
PDF  193 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32WB55CC Datasheet(HTML) 49 Page - STMicroelectronics

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DS11929 Rev 11
49/193
STM32WB55xx STM32WB35xx
Functional overview
57
3.18
Liquid crystal display controller (LCD)
The STM32WB55xx devices embed an LCD controller with the following characteristics:
Highly flexible frame rate control.
Supports Static, 1/2, 1/3, 1/4 and 1/8 duty.
Supports Static, 1/2, 1/3 and 1/4 bias.
Double buffered memory allows data in LCD_RAM registers to be updated at any time
by the application firmware without affecting the integrity of the data displayed.
–
LCD data RAM of up to 16 x 32-bit registers which contain pixel information
(active/inactive)
Software selectable LCD output voltage (contrast) from VLCDmin to VLCDmax.
No need for external analog components:
–
A step-up converter is embedded to generate an internal VLCD voltage higher
than VDD (up to 3.6 V if VDD > 2.0 V)
–
Software selection between external and internal VLCD voltage source. In case of
an external source, the internal boost circuit is disabled to reduce power
consumption
–
A resistive network is embedded to generate intermediate VLCD voltages
–
The structure of the resistive network is configurable by software to adapt the
power consumption to match the capacitive charge required by the LCD panel
–
Integrated voltage output buffers for higher LCD driving capability.
The contrast can be adjusted using two different methods:
–
When using the internal step-up converter, the software can adjust VLCD between
VLCDmin and VLCDmax
–
Programmable dead time (up to eight phase periods) between frames.
Full support of low-power modes: the LCD controller can be displayed in Sleep,
Low-power run, Low-power sleep and Stop modes, or can be fully disabled to reduce
power consumption.
Built in phase inversion for reduced power consumption and EMI (electromagnetic
interference).
Start of frame interrupt to synchronize the software when updating the LCD data RAM.
Blink capability:
–
1, 2, 3, 4, 8 or all pixels can be programmed to blink at a configurable frequency
–
Software adjustable blink frequency to achieve around 0.5 Hz, 1 Hz, 2 Hz or 4 Hz.
Used LCD segment and common pins should be configured as GPIO alternate functions
and unused segment and common pins can be used for general purpose I/O or for another
peripheral alternate function.
Note:
When the LCD relies on the internal step-up converter, the VLCD pin should be connected
to VSS with a capacitor. Its typical value is 1 μF.
3.19
True random number generator (RNG)
The devices embed a true RNG that delivers 32-bit random numbers generated by an
integrated analog circuit.



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