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STM32WB55 Datasheet(PDF) 157 Page - STMicroelectronics |
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STM32WB55 Datasheet(HTML) 157 Page - STMicroelectronics |
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157 / 193 page ![]() DS11929 Rev 11 157/193 STM32WB55xx STM32WB35xx Electrical characteristics 169 6.3.27 Timer characteristics The parameters given in the following tables are guaranteed by design. Refer to Section 6.3.17 for details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output). V44 Segment/Common highest level voltage - VLCD - V V34 Segment/Common 3/4 level voltage - 3/4 VLCD - V23 Segment/Common 2/3 level voltage - 2/3 VLCD - V12 Segment/Common 1/2 level voltage - 1/2 VLCD - V13 Segment/Common 1/3 level voltage - 1/3 VLCD - V14 Segment/Common 1/4 level voltage - 1/4 VLCD - V0 Segment/Common lowest level voltage - 0 - 1. Guaranteed by design. 2. LCD enabled with 3 V internal step-up active, 1/8 duty, 1/4 bias, division ratio = 64, all pixels active, no LCD connected. Table 88. LCD controller characteristics(1) (continued) Symbol Parameter Conditions Min Typ Max Unit Table 89. TIMx(1) characteristics Symbol Parameter Conditions Min Max Unit tres(TIM) Timer resolution time -1 - tTIMxCLK fTIMxCLK = 64 MHz 15.625 - ns fEXT Timer external clock frequency on CH1 to CH4 -0 fTIMxCLK/2 MHz fTIMxCLK = 64 MHz 0 40 ResTIM Timer resolution TIM1, TIM16, TIM17 - 16 bit TIM2 - 32 tCOUNTER 16-bit counter clock period - 1 65536 tTIMxCLK fTIMxCLK = 64 MHz 0.015625 1024 µs tMAX_COUNT Maximum possible count with 32-bit counter - - 65536 × 65536 tTIMxCLK fTIMxCLK = 64 MHz - 67.10 s 1. TIMx, is used as a general term where x stands for 1, 2, 16 or 17. |
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