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LTACG Datasheet(PDF) 1 Page - Linear Technology

Part # LTACG
Description  Hot Swappable 2-Wire Bus Buffers
PDF  16 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTACG Datasheet(HTML) 1 Page - Linear Technology

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LTC4300A-1/LTC4300A-2
1
sn4300a12 4300a12fs
The LTC
®4300A series hot swappable 2-wire bus buffers
allow I/O card insertion into a live backplane without
corruption of the data and clock busses. When the con-
nection is made, the LTC4300A-1/LTC4300A-2 provide
bidirectional buffering, keeping the backplane and card
capacitances isolated. Rise-time accelerator circuitry*
allows the use of weaker DC pull-up currents while still
meeting rise-time requirements. During insertion, the
SDA and SCL lines are precharged to 1V to minimize bus
disturbances.
The LTC4300A-1 incorporates a CMOS threshold digital
ENABLE input pin, which forces the part into a low current
modewhendriventogroundandsetsnormaloperationwhen
driven to VCC. It also includes an open drain READY output
pin, which indicates that the backplane and card sides are
connected together. The LTC4300A-2 replaces the ENABLE
pin with a dedicated supply voltage pin, VCC2, for the card
side, providing level shifting between 3.3V and 5V systems.
Both the backplane and card may be powered with supply
voltages ranging from 2.7V to 5.5V, with no contraints on
which supply voltage is higher. The LTC4300A-2 also re-
places the READY pin with a digital CMOS input pin, ACC,
whichenablesanddisablestherise-timeacceleratorcurrents.
The LTC4300A is available in a small 8-pin MSOP package.
s
Hot Board Insertion
s
Servers
s
Capacitance Buffer/Bus Extender
s
Desktop Computer
, LTC and LT are registered trademarks of Linear Technology Corporation.
s
Bidirectional Buffer for SDA and SCL Lines
Increases Fanout
s
Prevents SDA and SCL Corruption During Live
Board Insertion and Removal from Backplane
s
Isolates Input SDA and SCL Lines from Output
s
Compatible with I2C
TM, I2C Fast Mode and SMBus
Standards (Up to 400kHz Operation)
s
Small MSOP 8-Pin Package
s
Low ICC Chip Disable: <1µA (LTC4300A-1)
s
READY Open Drain Output (LTC4300A-1)
s
1V Precharge on all SDA and SCL Lines
s
Supports Clock Stretching, Arbitration and
Synchronization
s
5V to 3.3V Level Translation (LTC4300A-2)
s
High Impedance SDA, SCL Pins for VCC = 0V
Hot Swappable
2-Wire Bus Buffers
I2C is a trademark of Philips Electronics N. V.
*U.S. Patent No. 6,650,174
R1
10k
VCC
3.3V
R2
10k
ENABLE
SCLIN
SCLOUT
SDAIN
SDAOUT
15
4
67
32
8
GND
LTC4300A-1
READY
C1
0.01
µF
4300A-1/2 TA01
R3
10k
R4
10k
APPLICATIO S
FEATURES
TYPICAL APPLICATIO
DESCRIPTIO
Input–Output Connection tPLH
OUTPUT
SIDE
50pF
INPUT
SIDE
150pF
4300A TA02


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