PI3DPX1202A datasheet(25/51 Pages) DIODES

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February 2020

PI3DPX1202A

Document number: DS40115 Rev 3-3

PI3DPX1202A

SMBus

Registers

AUX

Registers

Description

Default

value

DP Ac-

cess

0x09

00201h

DEVICE_SERVICE_IRQ_VECTOR

Bit 0 = RESERVED for EMOTE_CONTROL_COMMAND_PENDING

When this bit is set to 1, the Source Device must read the Device Services

Field for REMOTE_CONTROL_COMMAND_PASS_THROUGH.

Bit 1 = AUTOMATED_TEST_REQUEST

When this bit is set to 1, the Source Device must read Addresses 00218h

-0027Fh for the requested link test.

Bit 2 = CP_IRQ

This bit is used by an optional content protection system.

Bit 3 = MCCS_IRQ

This bit is used by an optional MCCS system in the Sink

Bits 5:4 = RESERVED. Read all 0’s.

Bit 6 = SINK_SPECIFIC_IRQ

Usage is vendor-specific.

Bit 7 = RESERVED. Read 0.

00h

Clearable

read

only.

(Bit is

cleared

when

‘1’ is

written is

written

via an

AUX CH

write

transac-

tion.

0x0A

00206h

ADJUST_REQUEST_LANE0_1 : Voltage Swing and Equalization Setting

Adjust Request for Lane0 and Lane1

Bits 1:0 = VOLTAGE_SWING_LANE0

00 = Level 0

01 = Level 1

10 = Level 2

11 = Level 3

Bits 3:2 = PRE-EMPHASIS_LANE0

00 = Level 0

01 = Level 1

10 = Level 2

11 = Level 3

00h

0x0B

Bits 5:4 = VOLTAGE_SWING_LANE1

00 = Level 0

01 = Level 1

10 = Level 2

11 = Level 3

Bits 7:6 = PRE-EMPHASIS_LANE1

00 = Level 0

01 = Level 1

10 = Level 2

11 = Level 3

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