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AM2432BSDFHIALVR Datasheet(PDF) 90 Page - Texas Instruments

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Part # AM2432BSDFHIALVR
Description  AM243x Sitara??Microcontrollers
PDF  242 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM2432BSDFHIALVR Datasheet(HTML) 90 Page - Texas Instruments

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6.3.23.3 SYSTEM
MAIN Domain Instances
Table 6-70. System Signal Descriptions
Signal Name [1]
Signal Type [2]
Description [3]
ALV PIN [4]
ALX PIN [4]
CLKOUT0
O
RMII Clock Output (50 MHz). This pin is used for clock
source to the external PHY and must be routed back to
the RMII_REF_CLK pin for proper device operation.
A19, U13
A18, V13
EXTINTn (2)
I
External Interrupt
C19
EXT_REFCLK1
I
External clock input to MAIN Domain, routed to Timer
clock muxes as one of the selectable input clock sources
for Timer/WWDT modules, or as reference clock to
MAIN_PLL2 (PER1 PLL)
A19
A18
GPMC0_FCLK_MUX (1)
O
GPMC functional clock output selected through mux logic
R17
OBSCLK0
O
Observation clock output for test and debug purposes
only
D17
A15
PORz_OUT
O
MAIN Domain POR status output
E17
D18
RESETSTATz
O
MAIN Domain warm reset status output
F16
E19
RESET_REQz
I
MAIN Domain external warm reset request input
E18
C17
SYSCLKOUT0
O
SYSCLK0 output from MAIN PLL controller (divided by 6)
for test and debug purposes only
C17
B14
(1)
The GPMC0_FCLK_MUX signal is not supported by the AM243x_ALX device package. See AM243x_ALX Package - Unsupported
Interfaces and Signals for additional details.
(2)
The EXTINTn signal is not supported by the AM243x_ALX device package. See AM243x_ALX Package - Unsupported Interfaces
and Signals for additional details.
MCU Domain Instances
Table 6-71. MCU System Signal Descriptions
Signal Name [1]
Signal Type [2]
Description [3]
ALV PIN [4]
ALX PIN [4]
MCU_EXT_REFCLK0 (2)
I
External system clock input
B7
MCU_OBSCLK0
O
Observation clock output for test and debug purposes
only
C6, E10
B3
MCU_PORz
I
MCU Domain cold reset
B21
C20
MCU_RESETSTATz
O
MCU Domain warm reset status output
B13
A6
MCU_RESETz
I
MCU Domain warm reset
B12
A5
MCU_SAFETY_ERRORn
IO
Error signal output from MCU Domain ESM
A20
B20
MCU_SYSCLKOUT0 (1)
O
MCU Domain system clock output for test and debug
purposes only
C6
(1)
The MCU_SYSCLKOUT0 signal is not supported by the AM243x_ALX device package. See AM243x_ALX Package - Unsupported
Interfaces and Signals for additional details.
(2)
The MCU_EXT_REFCLK0 signal is not supported by the AM243x_ALX device package. See AM243x_ALX Package - Unsupported
Interfaces and Signals for additional details.
6.3.23.4 VMON
Table 6-72. VMON Signal Descriptions
Signal Name [1]
Signal Type [2]
Description [3]
ALV PIN [4]
ALX PIN [4]
VMON_1P8_MCU
A
Voltage monitor input for 1.8 V MCU power supply
K16
VMON_1P8_SOC
A
Voltage monitor input for 1.8 V SoC power supply
E12
F14
VMON_3P3_MCU
A
Voltage monitor input for 3.3 V MCU power supply
F13
VMON_3P3_SOC
PWR
Voltage monitor input for 3.3 V SoC power supply
F14
E15
VMON_VSYS
A
Voltage monitor input, fixed 0.45 V (+/-3%) threshold.
Use with external precision voltage divider to monitor a
higher voltage rail such as the PMIC input supply.
K10
G13
AM2434, AM2432, AM2431
SPRSP65C – APRIL 2021 – REVISED MARCH 2022
www.ti.com
90
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Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: AM2434 AM2432 AM2431



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