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AM2432BSDFHIALVR Datasheet(PDF) 98 Page - Texas Instruments |
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AM2432BSDFHIALVR Datasheet(HTML) 98 Page - Texas Instruments |
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98 / 242 page  Table 6-86. Connectivity Requirements (ALX Package) (continued) BALL NUMBER BALL NAME CONNECTION REQUIREMENTS C5 B3 A5 C17 C6 A3 B4 EMU0 EMU1 MCU_RESETz RESET_REQz TCK TDI TMS Each of these balls must be connected to the corresponding power supply(1) through separate external pull resistors to ensure these balls are held to a valid logic high level if a PCB signal trace is connected and not actively driven by an attached device. The internal pull-up may be used to hold a valid logic high level if no PCB signal trace is connected to the ball. B16 B15 I2C0_SCL I2C0_SDA Each of these balls must be connected to the corresponding power supply(1) through separate external pull resistors to ensure these balls are held to a valid logic high level. G17 H17 H21 F19 F21, F20 H20 E21 G20 E20 VDDA_ADC VDDA_ADC ADC0_AIN0 ADC0_AIN1 ADC0_AIN2 ADC0_AIN3 ADC0_AIN4 ADC0_AIN5 ADC0_AIN6 ADC0_AIN7 If the entire ADC0 is not used, each of these balls must be connected directly to VSS. H21 F19 F21, F20 H20 E21 G20 E20 ADC0_AIN0 ADC0_AIN1 ADC0_AIN2 ADC0_AIN3 ADC0_AIN4 ADC0_AIN5 ADC0_AIN6 ADC0_AIN7 Any unused ADC0_AIN[7:0] ball must be pulled to VSS through a resistor or connected directly to VSS when VDDA_ADC is connected to a power source. K15 J17 VDDA_3P3_SDIO CAP_VDDSHV_MMC1 If SDIO_LDO is not used to power VDDSHV5, each of these balls must be connected directly to VSS. V16 U15 U16 VDDA_0P85_USB0 VDDA_1P8_USB0 VDDA_3P3_USB0 If USB0 is not used, each of these balls must be connected directly to VSS. AA17 AA16 Y17 W17 V18 USB0_DM USB0_DP USB0_ID USB0_RCALIB USB0_VBUS If USB0 is not used, leave unconnected. Note: The USB0_RCALIB pin can only be left unconnected when VDDA_0P85_USB0, VDDA_1P8_USB0, and VDDA_3P3_USB0 are connected to VSS. The USB0_RCALIB pin must be connected to VSS through the appropriate external resistor when VDDA_0P85_USB0, VDDA_1P8_USB0, and VDDA_3P3_USB0 are connected to a power source. (1) To determine which power supply is associated with any IO, see POWER column of the Pin Attributes table. Note Internal pull resistors are weak and may not source enough current to maintain a valid logic level for some operating conditions. This may be the case when connected to components with leakage to the opposite logic level, or when external noise sources couple to signal traces attached to balls which are only pulled to a valid logic level by the internal resistor. Therefore, external pull resistors may be required to hold a valid logic level on balls with external connections. If balls are allowed to float between valid logic levels, the input buffer may enter a high-current state which could damage the IO cell. AM2434, AM2432, AM2431 SPRSP65C – APRIL 2021 – REVISED MARCH 2022 www.ti.com 98 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: AM2434 AM2432 AM2431 |
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