MPC5643L datasheet(75/136 Pages) NXP

75 / 136 page

NOTE

Open Drain can be configured by the PCRn for all pins used as output (except FCCU_F[0] and FCCU_F[1] ).

I[1]

PCR[129]

SIUL

GPIO[129]

ALT0

GPIO[129]

—

C12

eTimer_2

ETC[1]

ALT1

ETC[1]

PSMI[40];

PADSEL=1

DSPI_0

CS5

ALT2

—

FlexPWM_1

—

FAULT[1]

—

I[2]

PCR[130]

SIUL

GPIO[130]

ALT0

GPIO[130]

—

F16

eTimer_2

ETC[2]

ALT1

ETC[2]

PSMI[41];

PADSEL=1

DSPI_0

CS6

ALT2

—

FlexPWM_1

—

FAULT[2]

—

I[3]

PCR[131]

SIUL

GPIO[131]

ALT0

GPIO[131]

—

E17

eTimer_2

ETC[3]

ALT1

ETC[3]

PSMI[42];

PADSEL=1

DSPI_0

CS7

ALT2

—

CTU_0

EXT_TGR

ALT3

—

FlexPWM_1

—

FAULT[3]

—

RDY

PCR[132]

SIUL

GPIO[132]

ALT0

GPIO[132]

—

NPC

RDY

ALT2

—

1 Programmable via the SRC (Slew Rate Control) bit in the respective Pad Configuration Register; S = Slow, M = Medium, F = Fast, SYM =

Symmetric (for FlexRay)

2 The default function of this pin out of reset is ALT1 (TDO).

3 Analog

Table 7. Pin muxing (continued)

Port

name

PCR

Peripheral

Alternate

output

function

Output

mux sel

Input

functions

Input mux

select

Weak pull

config during

reset

Pad speed1

Pin #

SRC

144

pkg

257

pkg

MPC5643L Datasheet(PDF) 75 Page - NXP Semiconductors

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