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SPC5643LFF2MLL6 Datasheet(PDF) 54 Page - NXP Semiconductors

Part # SPC5643LFF2MLL6
Description  MPC5643L Microcontroller Data Sheet
PDF  136 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

SPC5643LFF2MLL6 Datasheet(HTML) 54 Page - NXP Semiconductors

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MPC5643L Microcontroller Data Sheet, Rev. 10
Package pinouts and signal descriptions
NXP Semiconductors
54
2.3
System pins
NOTE
None of system pins (except RESET) provides an open drain output.
2 VSS_LV balls are tied together on the 257 MAPBGA substrate.
3 VDD_HV balls are tied together on the 257 MAPBGA substrate.
4 VSS_HV balls are tied together on the 257 MAPBGA substrate.
Table 6. System pins
Symbol
Description
Direction
Pin #
144
pkg
257
pkg
Dedicated pins
MDO01
1 This pad is configured for Fast (F) pad speed.
Nexus Message Data Output — line
Output only
9
E1
NMI2
2 This pad contains a weak pull-up.
Non Maskable Interrupt
Input only
1
E4
XTAL
Input for oscillator amplifier circuit and internal clock generator
Input only
29
N1
EXTAL3
3 EXTAL is an "Output" in "crystal" mode, and is an "Input" in "ext clock" mode.
Oscillator amplifier output
Input/Output4
4 In XOSC Bypass Mode, the analog portion of crystal oscillator (amplifier) is disabled. An external clock can be applied
at EXTAL as an input. In XOSC Normal Mode, EXTAL is an output
30
R1
TMS2
JTAG state machine control
Input only
87
M16
TCK2
JTAG clock
Input only
88
L15
JCOMP5
5 This pad contains a weak pull-down.
JTAG compliance select
Input only
123
C10
Reset pin
RESET
Bidirectional reset with Schmitt-Trigger characteristics and noise filter.
This pin has medium drive strength. Output drive is open drain and
must be terminated by an external resistor of value 1KOhm.6
6 RESET output shall be considered valid only after the 3.3V supply reaches its stable value.
Bidirectional
31
P2
Test pin
VPP TEST
Pin for testing purpose only. To be tied to ground in normal
operating mode.
107
D15



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