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SPC5643LFF2MLL6 Datasheet(PDF) 60 Page - NXP Semiconductors |
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SPC5643LFF2MLL6 Datasheet(HTML) 60 Page - NXP Semiconductors |
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60 / 136 page  B[1] PCR[17] SIUL GPIO[17] ALT0 GPIO[17] — — M S 110 C14 eTimer_1 ETC[3] ALT2 ETC[3] PSMI[12]; PADSEL=0 SSCM DEBUG[1] ALT3 — — FlexCAN_0 — — RXD PSMI[33]; PADSEL=1 FlexCAN_1 — — RXD PSMI[34]; PADSEL=1 SIUL — — EIRQ[16] — B[2] PCR[18] SIUL GPIO[18] ALT0 GPIO[18] — — M S 114 A14 LINFlexD_0 TXD ALT1 — — SSCM DEBUG[2] ALT3 — — SIUL — — EIRQ[17] — B[3] PCR[19] SIUL GPIO[19] ALT0 GPIO[19] — — M S 116 B13 SSCM DEBUG[3] ALT3 — — LINFlexD_0 — — RXD PSMI[31]; PADSEL=0 B[4]2 PCR[20] SIUL GPIO[20] ALT0 GPIO[20] — — F S 89 L17 JTAGC TDO ALT1 — — B[5] PCR[21] SIUL GPIO[21] ALT0 GPIO[21] — Pull up M S 86 M15 JTAGC — — TDI — B[6] PCR[22] SIUL GPIO[22] ALT0 GPIO[22] — — F S 138 B3 MC_CGM clk_out ALT1 — — DSPI_2 CS2 ALT2 — — SIUL — EIRQ[18] — Table 7. Pin muxing (continued) Port name PCR Peripheral Alternate output function Output mux sel Input functions Input mux select Weak pull config during reset Pad speed1 Pin # SRC =1 SRC =0 144 pkg 257 pkg |
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