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AS5043TR Datasheet(PDF) 8 Page - ams AG

Part # AS5043TR
Description  PROGRAMMABLE 360째 MAGNETIC ANGLE ENCODER WITH ABSOLUTE SSI AND ANALOG OUTPUTS
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Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

AS5043TR Datasheet(HTML) 8 Page - ams AG

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AS5043 Programmable 360° Magnetic Angle Encoder
Revision 1.4, 04-Apr-06
www.austriamicrosystems.com
Page 8 of 26
Vref
90°
180°
270°
360°
0%
analog
output
voltage
angle
100%
90%
10%
normal
operating
area
In an error case, the output
voltage is in the grey area
Note: Figure 8 and are shown for 360° operation. See Table 5 (page 12) for further angular range programming options.
11.1.2 Diagnostic Output Mode
In Diagnostic Output Mode (see Figure
9) the analog output of the internal DAC
ranges from 10% - 90% Vref*). In an
error case, either when the supply is
interrupted or when the magnetic field is
in the “red” range, (see Table 3) the
output is switched to 0V and thus
indicates the error condition.
Figure 9: Diagnostic Output Mode
It is possible to enable the analog output permanently (it will not be switched off even if the magnetic field is out of range).
To enable this feature an OTP bit in the factory setting must be set. The corresponding bit is FS6. See application note
AS5040-20 (Extended features of OTP programming) for further details. The application note is available for download at the
austriamicrosystems website.
The analog and digital outputs will have the following conditions:
Status
DAC output voltage
SSI digital output
normal operation
10% - 90% Vref*)
#0 - #1023 (0°-360°),
MagRngn = 1
magnetic field out of range
< 10% Vref*),
DAC output is
switched to 0V
#0 - #1023 (0°-360°)
out of range is signaled in status bits:
MagInc=MagDec=LIN=1, MagRngn= 0
broken positive power supply
(VOUT pull down resistor at receiving side)
< 10% VDD**)
broken power supply ground
(VOUT pull down resistor at receiving side)
< 10% VDD**)
broken positive power supply
(VOUT pull up resistor at receiving side)
> 90% VDD**)
broken power supply ground
(VOUT pull up resistor at receiving side)
> 90% VDD**)
with pull down resistor at DO (receiving
side), all bits read by the SSI will be
“0”-s, indicating a non-valid output
*) Vref = internal: ½ * VDD5V (pin #16) or external: VDACref (pin#9), depending on Ref_extEN bit in OTP (0=int., 1=ext.)
**) VDD = positive supply voltage at receiving side (3.0 – 5.5V)


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