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OM8373 Datasheet(PDF) 57 Page - NXP Semiconductors

Part # OM8373
Description  TV signal processor- Closed Caption decoder with embedded m-Controller
PDF  108 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

OM8373 Datasheet(HTML) 57 Page - NXP Semiconductors

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2004 Jan 15
57
Philips Semiconductors
Tentative Device Specification
TV signal processor-Teletext decoder with
embedded
µ-Controller
OM8373; OM8378
Table 73
Video ident mode
Table 74
Disable reference oscillator check in the SUP
output bit (see also Table 140)
Table 75 Forced slicing level for vertical sync
Table 76
Switch-off in vertical overscan
Table 77
Forced field frequency
Table 78
Interlace
Table 79
Vertical divider mode
Table 80 Black current measuring lines in overscan (for
vertical zoom setting
< 1)
Table 81 AFC switch
Table 82 Disable flash protection
Table 83 X-ray detection
Table 84 Service blanking
Table 85
Adjustment Vg2 voltage
Table 86
Enable vertical guard (RGB blanking)
VID
VIDEO IDENT MODE
0
ϕ1 loop dependent on video ident system
1
ϕ1 loop not dependent on video ident system
RED
CONDITION
0
reference oscillator check enabled
1
reference oscillator check disabled
FSL
SLICING LEVEL
0
slicing level dependent on noise detector
1
fixed slicing level of 60%
OSO
MODE
0
Switch-off undefined
1
Switch-off in vertical overscan
FORF
FORS
FIELD FREQUENCY
0
0
auto (60 Hz when line not in sync)
0
1
60 Hz
1
0
keep last detected field frequency
1
1
auto (50 Hz when line not in sync)
DL
STATUS
0
interlace
1
de-interlace
NCIN
VERTICAL DIVIDER MODE
0
normal operation
1
switched to search window
OSVE
MODE
0
normal operation
1
measuring lines in overscan
AFN
MODE
0
normal operation
1
AFC not active
DFL
MODE
0
flash protection active
1
flash protection disabled
XDT
MODE
0
protection mode, when a too high EHT is
detected the receiver is switched to stand-by
and the XPR-bit is set to 1
1
detection mode, the receiver is not switched
to stand-by and only the XPR-bit is set to 1
SBL
SERVICE BLANKING MODE
0
off
1on
AVG
MODE
0
normal operation
1Vg2 adjustment (WBC and HBC bits in output
byte 01 can be read)
EVG
VERTICAL GUARD MODE
0
not active
1
active



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