HT45R06 datasheet(10/41 Pages) HOLTEK

10 / 41 page

HT45R06

Rev. 1.00

May 24, 2005

External interrupts are triggered by a high to low transi-

tion of the INT and the related interrupt request flag (EIF;

bit 4 of the INTC) will be set. When the interrupt is en-

abled, the stack is not full and the external interrupt is

active, a subroutine call to location 04H will occur. The

interrupt request flag (EIF) and EMI bits will be cleared

to disable other interrupts.

The internal timer/event counter interrupt is initialized by

setting the timer/event counter interrupt request flag

(TF; bit 5 of the INTC), caused by a timer overflow.

When the interrupt is enabled, the stack is not full and

the TF bit is set, a subroutine call to location 08H will oc-

cur. The related interrupt request flag (TF) will be reset

and the EMI bit cleared to disable further interrupts.

The A/D converter end-of-conversion interrupt is initial-

ized by setting the A/D end-of-conversion interrupt re-

quest flag (bit 6 of the INTC), caused by an end of A/D

conversion. When the interrupt is enabled, the stack is

not full and the end of A/D conversion interrupt request

flag is set, a subroutine call to location 00CH will occur.

The related interrupt request flag will be reset and the

EMI bit cleared to disable further interrupts.

During the execution of an interrupt subroutine, other in-

terrupt acknowledge are held until the

²RETI²

instruction is executed or the EMI bit and the related in-

terrupt control bit are set to 1 (if the stack is not full). To

return from the interrupt subroutine,

²RET² or ²RETI²

may be invoked. RETI will set the EMI bit to enable an

interrupt service, but RET will not.

Interrupts, occurring in the interval between the rising

edges of two consecutive T2 pulses, will be serviced on

the latter of the two T2 pulses, if the corresponding inter-

rupts are enabled. In the case of simultaneous requests

the following table shows the priority that is applied.

These can be masked by resetting the EMI bit.

Interrupt Source

Priority

Vector

External Interrupt

04H

Timer/Event Counter Overflow

08H

A/D Converter Interrupt

0CH

The timer/event counter interrupt request flag (TF), ex-

ternal interrupt request flags (EIF), A/D converter inter-

rupt request flag (ADF), enable timer/event counter

interrupt bit (ETI), enable A/D converter interrupt

(EADI), enable external interrupt (EEI) and enable mas-

ter interrupt bit(EMI) constitute the interrupt control reg-

isters (INTC) which is located at 0BH in the data

memory. EMI, EEI, ETI, EADI and are used to control

the enabling/disabling of interrupts. These bits prevent

the requested interrupts from being serviced. Once the

interrupt request flags (TF, EIF, ADF) are set, they will

remain in the INTC register until the interrupts are ser-

viced or cleared by a software instruction.

It is recommended that a program does not use the

²CALL subroutine² within the interrupt subroutine. Inter-

rupts often occur in an unpredictable manner or need to

be serviced immediately in some applications. If only

one stack is left and enabling the interrupt is not well

controlled, the original control sequence will be dam-

aged once the

²CALL² operates in the interrupt subrou-

tine.

Oscillator Configuration

There are two oscillator circuits in the microcontroller.

Bit No.

Label

Function

EMI

Controls the master (global) interrupt (1=enable; 0=disable)

EEI

Controls the external interrupt (1=enable; 0=disable)

ETI

Controls the timer/event counter interrupt (1=enable; 0=disable)

EADI

Controls the A/D converter interrupt (1=enable; 0=disable)

EIF

External interrupt request flag (1=active; 0=inactive)

Internal timer/event counter request flag (1=active; 0=inactive)

ADF

A/D converter request flag (1=active; 0=inactive)

Unused bit, read as

²0²

INTC (0BH) Register

C r y s t a l O s c i l l a t o r

R C O s c i l l a t o r

O S C 1

O S C 2

N M O S O p e n D r a i n

O S C 2

f S Y S / 4

O S C 1

V D D

System Oscillator

HT45R06 Datasheet(PDF) 10 Page - Holtek Semiconductor Inc

HT45R06 Datasheet(HTML) 10 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

Datasheet Download

Link URL