In order to minimize the RMS current flowing through the input filter and improve overall EMC performance, the

L3751 device provides a phase shift of 180° between the master and the slaves. If more than two devices are

synchronized, the phase shift is fixed and all slaves have a common 180° phase shift with respect to the master.

Considering two L3751 operating synchronized which regulate the same output voltage (i.e.: operating with the

same duty cycle), the input filter RMS current is minimized and is calculated as:

IRMS= IOUT2∙ 2D∙ 1−2D              if D<0.5

    IOUT2∙ 2D−1 ∙ 2−2D       if D>0.5

(26)

The graphical representation of the input RMS current of the input filter in the case of two devices with 0°

phase shift (synchronized to an external signal) or 180° phase shift (synchronized connecting their SYNCH pins)

regulating the same output voltage.

8.3

PCB board layout

The PCB board design is a crucial factor for the final application EMC and for the proper device operation in buck

converter topology, which is critical for inherent high dv/dt pulsed current paths. The scenario gets even more

complex for a controller with external MOSFETs because of additional gate-driving paths that are often internally

optimized in a monolithic device.

Figure 29. Pulsed current paths in buck topology

Figure 29 shows the current paths in buck topology: at TON inception, when the HS (“high-side switch”) is closed,

an impulsive current, green-dotted trace, flows from VIN to the LS (“low-side switch”) diode to recover the majority

gate charge in spatial zone; that is the Qrr for the diode reverse recovery operation from forward biasing. This

pulsed current level can be much higher than load current: the gate charge amount depends on the diode p-n

junction and the peak current is limited only by parasitic. When the diode is reverse bias, the LX node rises and

the HS current becomes the inductor current, so the output current ripple included, which is the green trace.

Contrary to the HS turn-off, the inductor current starts to flow through the LS body-diode during the deadtime

and then through the LS, when enabled by the anti-cross conduction circuitry. At the same time, the blue-dotted

trace current, flowing from VCC to the LX node grounded, restores the HS gate charge spent during TON on the

bootstrap capacitor and compensates for the HS driver current consumption.

The quoted switched currents may generate voltage spikes caused by inductive parasitic components related to

the PCB board traces and package bonding wires of the external power components.

L3751

PCB board layout

DS13841 - Rev 1

page 28/41