L9963T datasheet(25/45 Pages) STMICROELECTRONICS

25 / 45 page

In case the device is configured as SPI Master (NSLAVE = 1), L9963T directly manages the start/end of frame by

driving NCS and SCK according to the SPI parameters in Table 21.

Between the start and end of frame events, the incoming synchronous bit on SDI pin are accepted and, if

their number is in the allowed NBIT_PER_FRAME_RANGE range, the frame is stored into TX queue, provided

that the TXEN pin is high. In case of FIFO full and TXEN pin high the incoming frame replaces the last

received frame. In case the TXEN pin is latched low at the start of frame, the data incoming on SDI pin

is discarded and not stored into the TX queue. This typically happens when the MCU is performing a burst

read on the RX queue (e.g. after having issued a burst command to an L9963 device). The TX queue can

contain up to MAX_TX_QUEUE_FRAME_NUMBER frames. Such frames can have different length (within the

NBIT_PER_FRAME_RANGE). Frames with different length can be stored at the same time in the TX queue.

3.4.1.3

Output to ISOline interface

When the TX queue is not empty, the device transfers the frames not read yet towards the ISOline, following a

FIFO approach.

The propagation of the queued frames is done as soon as the ISOline is sensed IDLE, meaning that the

peripheral has finished transmitting previous frames from TX queue itself and it is not busy receiving frames from

outside.

Frames transmitted towards the ISOline are separated with an inter-frame delay ISO_TX_IF depending on the

frequency configuration:

•

8TBIT_LENGTH_FAST (ISOFREQISOFREQ = 1)

•

4TBIT_LENGTH_SLOW (ISOFREQ = 0)

Such an inter-frame delay is needed in order to guarantee a correct split between the different frames by the

ISOline receiver on the other communication side.

3.4.1.4

Output to SPI interface

3.4.1.4.1

Output to SPI interface in case of Master transceiver (NSLAVE = 1)

When the RX queue is not empty L9963T asserts the NCS pin towards the external Slave device and starts

sending out the RX queue content following a FIFO approach.

SCLK frequency has been latched while in Trimming & Config Latch and will not vary during device operation.

3.4.1.4.2

Output to SPI interface in case of Slave transceiver (NSLAVE = 0)

Whenever the RX queue is not empty (it contains at least a not-yet-read frame), the BNE pin must be set high in

order to perform interrupt based communication with the Master MCU.

As soon as the microprocessor asserts the NCS, L9963T starts sending out the RX queue content following a

FIFO approach. Each bit is sent synchronously with SCK provided by the microprocessor itself. The timings of

SDO with respect to SCK and NCS must follow the electrical characteristics listed in Table 21. In case RX queue

is empty (BNE = 0) and MCU still performs a read access, the SDO buffer is left in HiZ.

Values read by the MCU on its SDI pin depend on the external pull up/pull down resistor.

3.4.2

Communication parameters

Table 18. Communication parameters

Symbol

Parameters

Test conditions Min

Typ

Max Unit

NBIT_PER_FRAME_RANGE

Frame width

Design info

bit

MAX_TX_QUEUE_FRAME_NUMBER TX queue size

Design info

frame

MAX_RX_QUEUE_FRAME_NUMBER RX queue size

Design info

frame

ISO_IDLE

Minimum ISOline inactivity time,

measured in respect to the last valid

received bit. Marks the recognition of

the IDLE state. Must be always greater

than ISO_TX_IF to avoid TX conflicts.

ISOFREQ = 0

(Slow ISO)

13.75 16.5

μs

ISOFREQ = 1

(Fast ISO)

3.4

4.25

5.1

L9963T

Serial communication interface

DS13590 - Rev 4

page 25/45

L9963T Datasheet(PDF) 25 Page - STMicroelectronics

L9963T Datasheet(HTML) 25 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

Datasheet Download

Link URL