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AP7375 Datasheet(PDF) 11 Page - Diodes Incorporated |
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AP7375 Datasheet(HTML) 11 Page - Diodes Incorporated |
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11 / 18 page ![]() AP7375 Document number: DS44490 Rev. 3 - 2 11 of 18 www.diodes.com September 2022 © Diodes Incorporated AP7375 Application Information Output Capacitor An output capacitor is required for the stability of the LDO. The recommended minimum output capacitance is 10 μF. A ceramic capacitor is recommended, and temperature characteristics are X7R or X5R. Higher capacitance values help to improve load/line transient response. The output capacitance may be increased to keep low undershoot/overshoot. Place output capacitor as close as possible to VOUT and GND pins. Input Capacitor A 1μF ceramic capacitor is recommended to connect between VIN and GND pins to decouple input power supply glitch and noise. The amount of the capacitance may be increased without limit. This input capacitor must be located as close as possible to the device to assure input stability and less noise. For PCB layout, a wide copper trace is required for both VIN and GND. Current Limit and Short Circuit Protection When output current at VOUT pin is higher than current-limit threshold or the VOUT pin is direct short to GND, the current-limit protection will be triggered and clamp the output current at a pre-designed level to prevent overcurrent and thermal damage. Thermal Protection The AP7375 has internal thermal sense and protection circuits. When excessive power dissipation happens on the device, such as short circuit at the output pin or very heavy load current with a large voltage drop across the device, the internal thermal protection circuit will be triggered, and it will shut down the power MOSFET to prevent the LDO from damage. As soon as excessive thermal condition is removed and the temperature of the device drops down, the thermal protection circuit will lease the control of the power MOSFET, and the LDO device goes to normal operation. Layout Considerations For good ground loop and stability, the input and output capacitors should be located close to the input, output, and ground pins of the device. The regulator ground pin should be connected to the external circuit ground to reduce voltage drop caused by trace impedance. Ground plane is generally used to reduce trace impedance. Wide trace should be used for large current paths from VIN to VOUT, and load circuit. |
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