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LPC55S2X Datasheet(PDF) 46 Page - NXP Semiconductors |
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LPC55S2X Datasheet(HTML) 46 Page - NXP Semiconductors |
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46 / 140 page  LPC55S2x/LPC552x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2022. All rights reserved. Product data sheet Rev. 2.2 — 8 December 2022 46 of 139 NXP Semiconductors LPC55S2x/LPC552x 32-bit ARM Cortex-M33 microcontroller [1] Gaps between AHB matrix slave ports are not shown. 4 0x2002 0000 0x2002 FFFF SRAM 2 on CM33 data bus, 64 KB. 5 0x2003 0000 0x2003 FFFF Reserved 6 0x2004 0000 0x2004 3FFF SRAM 4 on CM33 data bus, 16 KB. 7 0x4000 0000 0x4001 FFFF AHB to APB bridge 0. See Section 7.16. 0x4002 0000 0x4003 FFFF AHB to APB bridge 1. See Section 7.16. 8 0x4008 0000 0x4008 FFFF AHB peripherals. See Section 7.17. 9 0x4009 0000 0x4009 FFFF AHB peripherals. See Section 7.17. 10 0x400A 0000 0x400A FFFF AHB peripherals. See Section 7.17. 11 0x4010 0000 0x4010 FFFF AHB peripherals. See Section 7.17. Table 5. Memory map overview AHB port Start address End address Function [1] |
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