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LPC55S2X Datasheet(PDF) 9 Page - NXP Semiconductors |
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LPC55S2X Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 140 page ![]() LPC55S2x/LPC552x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2022. All rights reserved. Product data sheet Rev. 2.2 — 8 December 2022 9 of 139 NXP Semiconductors LPC55S2x/LPC552x 32-bit ARM Cortex-M33 microcontroller 5. Block diagram Fig 4. LPC55S2x/LPC552x Block Diagram Multilayer AHB Matrix Coprocessor interface with math function JTAG boundary scan Serial Wire Debug CRC engine SRAM2 64 KB SRAMX 32 KB SRAM1 64 KB SCTimer / PWM HS GPIO CLKIN CRYSTAL CLKOUT Clocks, Power control, DC-DC Converter, LDOs, system functions PoR PLL BoD FRO SDIO registers MPU Debug Interface ISP-AP registers FPU RST_n VDD Lx ROM SRAM4 16 KB USB-FS Dev registers USB-HS Host registers SRAM 16 KB USB SRAM Interface USB-HS Dev registers CASPER Registers System Functions APB bridge 0 2x 32-bit timer (CTIMER0, 1) GPIO Pin Interrupts I/O configuration PUF KEY SHA-2/AES registers Temp sensor ADC: 1Ms/s, 16b, 8-diff ch. APB bridge 1 PMU registers Flash Controller registers 3x 32-bit timer (CTIMER2,3,4) In AO Power Domain Real Time Clock, Alarm & Wakeup RTC time capture 32 kHz clk (FRO/ XTAL) WD_Osc (FRO1M) Windowed Watchdog MicroTick Timer Analog Comparator GPIO group interrupts Peripheral input muxes Multi-rate Timer PLU HS LSPI ANA Ctrl USB-FS Host registers Arm Cortex-M33 AIPS Bridge SRAM0 64 KB PUF Key Wrapper DMA0 registers Flexcomm 0-4 [1] Flexcomm 5-7 [1] USB-PHY DMA1 registers RNG OS_Event_Timer Secure HS GPIO Secure GPIO Pin Interrupts Flash 512 KB Flash interface PRINCE 190307 DMA0 DMA1 SDIO interface SDIO FS USB bus USB FS Host/ Device & PHY Hash- AES Frequency Measurement Unit |
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