MIC33M656 datasheet(29/46 Pages) MICROCHIP

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 2019 Microchip Technology Inc.

DS20006256A-page 29

MIC33M656

7.0

PROGRAMMABILITY

The MIC33M656 internal registers are summarized in

the MIC33M656 Register Map.

TABLE 7-1:

MIC33M656 REGISTER MAP

Address

0x00

Control Register (CTRL1)

TON[1:0]

ILIM[1:0]

EN_DELAY[1:0]

EN_INT

EN_CON

0x01

Output Control Register (CTRL2)

DIS_100PCT

FPWM

OT_LATCH

PULL_DN

SLEW_RATE[3:0]

0x02

Output Voltage Register (VOUT)

VO[7:0]

0x03

Status and Fault Register (FAULT)

OT_WARN

EN_STAT BOOT_ERR

SSD

HICCUP

LATCH_OFF

CTRL1: CONTROL REGISTER (ADDRESS 0x00)

R/W-V

R/W-0

TON[1:0]

ILIM[1:0]

EN_DELAY[1:0]

EN_INT

EN_CON

bit 7

bit 0

Legend:

V = Factory programmed POR value

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-6

TON[1:0]: On Time

00 = Low frequency

01 = Medium frequency

10 = High frequency

11 = Very high frequency

bit 5-4

ILIM[1:0]: High-Side Peak Current Limit

00 = 3.5A

01 = 5A

10 = 8.5A

11 = 10A

bit 3-2

EN_DELAY[1:0]: Enable Delay

00 = 250 µs

01 = 1 ms

10 = 2 ms

11 = 3 ms

bit 1

EN_INT: Enable Bit Register Control

0 = Register controlled

1 = Enable pin controlled

bit 0

EN_CON: Enable Control

0 = Off

1 = On

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