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MIC33M656 Datasheet(PDF) 17 Page - Microchip Technology |
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MIC33M656 Datasheet(HTML) 17 Page - Microchip Technology |
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17 / 46 page ![]() 2019 Microchip Technology Inc. DS20006256A-page 17 MIC33M656 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. 3.1 Power Ground Pin (PGND) PGND is the ground path for the MIC33M656 buck converter power stage. The PGND pin connects to the sources of the low-side N-channel MOSFET, the nega- tive terminals of the input capacitors and the negative terminals of the output capacitors. The loop for the Power Ground should be as small as possible and separate from the Analog Ground (AGND) loop. 3.2 Switch Node Pin (SW) Switching node output pin which connects to the inter- nal MOSFETs and inductor. This is a high-frequency connection; therefore, traces should be kept as short and as wide as practical. 3.3 Input Voltage Pin (PVIN) Input supply to the source of the internal high-side P-channel MOSFET. The PVIN operating voltage range is from 2.4V to 5.5V. An input capacitor between PVIN and the Power Ground (PGND) pin is required and placed as close as possible to the IC. 3.4 Analog Voltage Input Pin (SVIN) The power to the internal reference and control sections of the MIC33M656. Internally connected to PVIN through a 10 resistor. TABLE 3-1: PIN FUNCTION TABLE Pin Number Symbol Description 2, 3, 4, 5, 23, 24, 39, 40 PGND Power Ground is the ground path for the MIC33M650 power module. 1, 53 AUX_PVIN Auxiliary Power Input Voltage Pins: Connect externally to PVIN. 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22 SW Switch Node Pins. SW connects to the internal MOSFETs and inductor. Do not connect any external load to this point. 41, 42 PVIN Power Supply Voltage Pins. 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38 OUT Output Side Connection Pins. 43, 44 SVIN Analog Voltage Input Pins: The power to the internal reference and control sections of the MIC33M650. Internally connected to PVIN through a 10 resistor. 46, 47 AUX_AGND Auxiliary Analog Ground Pins: Connect externally to AGND. 45 SCL I2C Clock (Input) Pin: I2C serial bus clock input. 48 SDA I2C Data (Input/Output) Pin: I2C serial bus data bidirectional pin. 49 EN Enable (Input) Pin: Logic high enables the operation of the regulator. The EN pin should not be left floating. 50 PG Power Good (Output) Pin: This is an open-drain output that indicates when the output voltage is higher than the 91% limit. 51 VOUT Output Voltage Sense (Input) Pin: This pin is used to remotely sense the output voltage. Connect VOUT as close to the output capacitor as possible to sense the output voltage. 52 AGND Analog Ground Pin: Internal signal ground for all low-power circuits. 54 EP_OUT Exposed Thermal Pad: Internally connected to OUT. 55 EP_SW Exposed Thermal Pad: Internally connected to SW node. 56 EP_PGND Exposed Thermal Pad: Internally connected to PGND. 57 EP_PVIN Exposed Thermal Pad: Internally connected to PVIN. |
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