AM69AX datasheet(272/299 Pages) TI

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• Analog PHY & CLK Voltages

• Analog Low Voltages

• Efuse Programming Voltages

• LDO Bulk Filter Capacitors

Common device power supply input types can be grouped together into power rails. All power rails must be

supplied by power resources designed to support the most strigent power supply voltage specification and total

load current demands. Two recommended Power Distribution Networks (PDNs) have been defined that either

combine or isolate MCU and Main domains, (refer to Power Supply Mapping).

It is possible that a few power supply inputs may not be needed in some systems. In such cases, all unused

supply inputs, other than VPP_CORE & VPP_MCU, must be connected to a valid power rail with a proper

voltage level in order to ensure device reliability (refer to Recommended Operating Conditions). The following

examples are given for reference:

1. If MCU Island safety monitor or MCU Only low power processing are not used, then VDD_MCU supply can

be combined with the VDD_CORE supply with compatible operating voltage specification.

2. If UHS-I SD Card or USB2.0 interface is not needed, then VDDSHV5 (MMC1 interface) and

VDDA_USB_3P3 (USB PHY interface) can be combined with VDD_IO_3V3 digital IO power rail.

3. If General Purpose device type is used, then Efuse programming voltages VPP_CORE & VPP_MCU are not

needed and should be left unconnected.

8.5.5 Peripherals

8.5.5.1 ADC

The Analog-to-Digital Converter (ADC) module contains a single 12-bit ADC which can be multiplexed to any 1

of 8 analog inputs (channels).

For more information, see Analog-to-Digital Converter (ADC) section in Peripherals chapter in the device TRM.

8.5.5.2 ATL

The Audio Tracking Logic (ATL) is used by HD Radio™ applications to synchronize the digital audio output to

the baseband clock. This same IP can also be used generically to track errors between two reference signals

(such as frame syncs) and generate a modulated clock output (using software-controlled cycle stealing) which

averages to some desired frequency. This process can be used as a hardware assist for asynchronous sample

rate conversion algorithms.

For more information, see Audio Tracking Logic (ATL) section in Peripherals chapter in the device TRM.

8.5.5.3 CSI

8.5.5.3.1 Camera Streaming Interface Receiver (CSI_RX_IF) and MIPI DPHY Receiver (DPHY_RX)

The integration of the CSI_RX_IF module allows the device to stream video inputs from multiple cameras to the

image processing accelerator (VPAC) or to internal memory. The video input may also be retransmitted via the

transmitter CSI (CSI_TX_IF) for debug and test purposes.

For more information, see Camera Streaming Interface (CSI) section in Peripherals chapter in the device TRM.

8.5.5.3.2 Camera Streaming Interface Transmitter (CSI_TX_IF)

The integration of the CSI_TX_IF module allows the device to stream out video data from memory, or retransmit

from the CSI receivers as an optional loopback output for diagnostics, debug, and test purposes.

For more information, see Camera Streaming Interface (CSI) section in Peripherals chapter in the device TRM.

8.5.5.4 CPSW2G

The two-port Gigabit Ethernet MAC (MCU_CPSW0) subsystem provides Ethernet packet communication for the

device and is configured in a similar manner as an Ethernet switch. MCU_CPSW0 features the Reduced Gigabit

Media Independent Interface (RGMII), Reduced Media Independent Interface (RMII), and the Management Data

Input/Output (MDIO) interface for physical layer device (PHY) management.

For more information, see Gigabit Ethernet Switch (CPSW0) section in Peripherals chapter in the device TRM.

AM69A

SPRSP92 – FEBRUARY 2023

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