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IP175DLF Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers |
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IP175DLF Datasheet(HTML) 6 Page - List of Unclassifed Manufacturers |
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6 / 145 page ![]() IP175DLF Datasheet 6/145 August 22, 2014 Copyright © 2007, IC Plus Corp. IP175DLF-DS-R10.1 Revision History Revision # Change Description IP175DLF-DS-R08.1 IP175DLF-DS-R08.2 IP175DLF-DS-R08.3 IP175DLF-DS-R08.4 IP175DLF-DS-R08.5 IP175DLF-DS-R08.6 IP175DLF-DS-R08.7 IP175DLF-DS-R08.8 IP175DLF-DS-R08.9 IP175DLF-DS-R09.0 IP175DLF-DS-R09.1 IP175DLF-DS-R09.1 1 IP175DLF-DS-R09.1 2 IP175DLF-DS-R09.1 3 1. Modify VCC minimum from 1.85V to 1.7V 1. Modify MDIO0 output delay (5 == > 15ns) and hold timing (10ns == > 5ns) 1. Modify MDIO1 timing on page 139 1. Add PHY ID Map on page 59 1. Add built in regulator description on page 59 2. Modify LOW_10M_EN description on page 16 1. Modify MAC_X_EN description on page 17 1. Modify Pin name 58, 59, 65 and 68 on page 9 1. Modify Restart Auto-Negotiation description on page 61 1. Add MDIO0 output delay(min)( -- == > 5ns) on page 138 2. Modify MDC0 period (min)( 80 == > 100ns) on page 138 3. Remove LED_SEL[1:0] debug description on page 91 1. Modify phy 21.20[7:0] register (cpu interrupt enable function ---> loop detection function 2. Modify phy 21.21[7:0] register (cpu interrupt status function ---> loop port indicator function 3. Add blocking/Recovery loop port function in register 27.9[15:14] and 27.11[15:14] 4. Modify cpu interrupt control description on page 52. 5. Add loop detection function description on page 55. 1. Modify VCC(min) from 1.70V to 1.85V on page 132 2. Modify VCC(max) from 2.00V to 2.05V on page 132 3. Modify Regout(max) from 2.00V to 2.05V on page 132 1. Add Spec Tag function description on page 55 1. Modify rate control description on page 38 1. Modify REG_OUT register description on page 13 2. Modify Built in regulator description on page 59 3. Modify MF_CTRL[1:0] register description on page 127 4. Modify MF_FW_CTRL[1:0] register description on page 128 5. Modify MF_MBS[15:0] and MF_CREDIT_SIZE registers description on page 129 IP175DLF-DS-R10.0 IP175DLF-DS-R10.1 1. Modify MDC0 period minimum from 100ns to 80ns on page 138 1. Add PHY5 description on page 60 to 71 Disclaimer This document probably contains the inaccurate data or typographic error. In order to keep this document correct, IC Plus reserves the right to change or improve the content of this document. |
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