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HC705V8GRS/D Datasheet(PDF) 71 Page - NXP Semiconductors |
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HC705V8GRS/D Datasheet(HTML) 71 Page - NXP Semiconductors |
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71 / 172 page ![]() SECTION 7: POWER SUPPLY AND REGULATION Page 60 MC68HC705V8 Specification Rev. 2.1 bandwidth and effectiveness of the network. Figure 7-7: HC705V8 Internal Power Routing 1) VDD to VSSD (pins 30 & 31): On-chip regulator output decoupling. As with any regulator, the output must be adequately decoupled to maintain stability of the regulator. Decouple with at least 10 uF tantalum or aluminum electrolytic bulk in parallel with 0.1 uF ceramic or polysty- rene capacitor for high frequency (HF) stability. Locate both capacitors as close as possible to PF3/MISO PF2/MOSI PF1/SCLK PF0/SS PB0 PB1 PB2 PB3 PB4 PB5 PB6/TCMP PB7/TCAP VSSA2 LOAD BUS VPP N.C. PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PE7/AN15 PE6/AN14 PE5/AN13 PE4/AN12 PD7/AN7 PD6/AN6 PD5/AN5 PD4/AN4 PD3/AN3 Regulator DLC A/D R R ~ 40 ohms Digital Logic Blocks 68-pin PLCC package shown 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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