HC805K3GRSSLASHD datasheet(32/119 Pages) NXP

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General Release Speciﬁcation

Random-Access Memory (RAM)

MC68HC805K3 — Rev. 1.0

Memory Map

2.4 Random-Access Memory (RAM)

The total RAM consists of 64 bytes (including the stack) at locations

$00C0 through $00FF. The stack pointer can access 32 locations from

$00E0 to $00FF. The stack begins at address $00FF and proceeds

down to $00E0. Using the stack area for data storage or temporary work

locations requires care to prevent it from being overwritten due to

stacking from an interrupt or subroutine call.

2.5 User Electronically Erasable Programmable Read-Only Memory

A total of 928 bytes of user EEPROM is on chip. This includes 160 bytes

in page zero from locations $0020 through $00BF, 760 bytes of user

EEPROM with locations $0100 through $03F7 for user program storage,

and 8 bytes for user vectors at locations $03F8 through $03FF.

2.6 Mask Option Registers (MOR) $0012 and $0013

The mask option registers consist of 10 EEPROM bits located at $0012

and $0013. These registers hold the option bits for the interrupt

sensitivity, COP enable/disable, enable pulldowns/interrupt on port A

and port B, interrupts via the lower four bits of port A, STOP instruction

as HALT, oscillator type, and security. When in the erased state, the

EEPROM cells will read as logic zeros. These registers are refreshed at

a rate of 1 ms (typical) using an internal ring oscillator. During STOP and

MOR programming, the MOR1 and MOR2 will not be refreshed.

$0012

Bit 7

654321

Bit 0

Read:

RCSTD

PIN3

HALT

SWPDI

PIRQ

LEVIRQ

COPEN

Write:

$0013

Bit 7

654321

Bit 0

Read:

SBIT1

SBIT0

Write:

= Unimplemented

Figure 2-5. Mask Option Register

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC805K3GRS/D Datasheet(PDF) 32 Page - NXP Semiconductors

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