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HC805K3GRS/D Datasheet(PDF) 49 Page - NXP Semiconductors |
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HC805K3GRS/D Datasheet(HTML) 49 Page - NXP Semiconductors |
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49 / 119 page ![]() MC68HC805K3 — Rev. 1.0 Resets 49 General Release Specification — MC68HC805K3 Section 5. Resets 5.1 Contents 5.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 5.3 External Reset (RESET). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 5.4 Internal Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 5.4.1 Power-On Reset (POR). . . . . . . . . . . . . . . . . . . . . . . . . . . .50 5.4.2 Computer Operating Properly Reset (COPR) . . . . . . . . . . .51 5.4.3 Illegal Address Reset (ILADR) . . . . . . . . . . . . . . . . . . . . . .51 5.2 Introduction The MCU can be reset from four sources: one external input and three internal restart conditions. The RESET pin is an input with a Schmitt trigger, as shown in Figure 5-1. All the internal peripheral modules that drive external pins are reset by the synchronous reset signal (RST) coming from a latch, which is synchronized to the PH2 bus clock and set by any of the four reset sources. NOTE: Activation of the RST signal generally is referred to as a reset of the device, unless otherwise specified. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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