STM32U545NET3QTR datasheet(229/283 Pages) STMICROELECTRONICS

229 / 283 page

DS14216 Rev 1

229/283

STM32U545xx

Electrical characteristics

258

5.3.23

Digital-to-analog converter characteristics

Table 112. VBAT charging characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

RBC

Battery charging resistor

VBRS = 0

kΩ

VBRS = 1

1.5

Table 113. DAC characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VDDA

Analog supply voltage for

DAC ON

-1.6

3.6

VREF+

Positive reference voltage

1.6

VDDA

VREF-

Negative reference voltage

VSSA

Resistive load

DAC output

buffer ON

connected to VSSA

kΩ

connected to

VDDA

Output impedance

DAC output buffer OFF

RBON

Output impedance sample

and hold mode, output

buffer ON

VDDA = 2.7 V

1.5

VDDA = 2.0 V

2.5

RBOFF

Output impedance sample

and hold mode, output

buffer OFF

VDDA = 2.7 V

16.5

VDDA = 2.0 V

17.5

Capacitive load

DAC output buffer OFF

CSH

Sample and hold mode

0.1

µF

VDAC_OUT

Voltage on DAC_OUT

output

DAC output buffer ON

0.2

VDDA - 0.2

DAC output buffer OFF

VREF+

tSETTLING

Settling time (full scale: for

a 12-bit code transition

between the lowest and the

highest input codes when

DAC_OUT reaches the

final value of ±0.5 LSB,

±1 LSB, ±2 LSB, ±4 LSB,

or ±8 LSB)

Normal mode

DAC output

buffer ON

CL ≤ 50 pF,

RL ≥ 5 kΩ

±0.5 LSB

2.05

3.05

µs

±1 LSB

1.90

±2 LSB

1.85

2.85

±4 LSB

1.80

2.8

±8 LSB

1.75

2.65

Normal mode DAC output

buffer OFF, ±1 LSB, CL = 10 pF

-1.7

tWAKEUP

(2)

Wake-up time from off state

(setting the ENx bit in the

DAC control register) until

the final value ±1 LSB

Normal mode DAC output buffer

CL ≤ 50 pF, RL = 5 kΩ

-4.2

7.5

µs

Normal mode DAC output

buffer OFF, CL ≤ 10 pF

-2

STM32U545NET3QTR Datasheet(PDF) 229 Page - STMicroelectronics

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