STM32U545NET3QTR datasheet(250/283 Pages) STMICROELECTRONICS

Part #	STM32U545NET3QTR

Description	Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, 512 KB flash memory, 274 KB SRAM, crypto

PDF	283 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

Logo

250 / 283 page

Electrical characteristics

STM32U545xx

250/283

DS14216 Rev 1

Figure 51. USART timing diagram in master mode

Table 128. USART characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fCK

USART clock

frequency

Master mode, 1.71 V ≤ VDDIOX ≤ 3.6 V

MHz

Slave receiver, 1.71 V ≤ VDDIOX ≤ 3.6 V

Slave transmitter, 1.71 V ≤ VDDIOX ≤ 3.6 V

28.5

Slave transmitter, 2.7 V ≤ VDDIOX ≤ 3.6 V

tsu(NSS)

NSS setup

time

Slave mode

Tker(2) + 2

th(NSS) NSS hold time Slave mode

tw(CKH)

tw(CKL)

CK high and

low time

Master mode

1/fCK / 2 - 1 1/fCK / 2 1/fCK / 2 + 1

tsu(RX)

Data input

setup time

Master mode

Slave mode

th(RX) Data input

hold time

Master mode

th(RX)

Slave mode

tv(TX)

Data output

valid time

Slave mode, 2.7 V ≤ VDD ≤ 3.6 V

17.5

Slave mode, 1.71 V ≤ VDD ≤ 3.6 V

15.5

tv(TX)

Master mode

2.5

6.5

th(TX)

Data output

hold time

Slave mode

8.5

th(TX)

Master mode

1. Evaluated by characterization. Not tested in production.

2. Tker is the usart_ker_ck_pres clock period.

MSv65386V4

CPHA = 0

OUTPUT

INPUT

CPHA = 0

LSB OUT

LSB IN

CPOL = 0

CPOL = 1

BIT1 OUT

1/fCK

tw(CKH)

tw(CKL)

th(RX)

CPHA = 1

CPOL = 0

CPOL = 1

tsu(RX)

tv(TX)

th(TX)

MSB IN

BIT6 IN

MSB OUT

STM32U545NET3QTR Datasheet(PDF) 250 Page - STMicroelectronics

STM32U545NET3QTR Datasheet(HTML) 250 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL