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STM32U545NET3QTR Datasheet(PDF) 254 Page - STMicroelectronics

Part # STM32U545NET3QTR
Description  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, 512 KB flash memory, 274 KB SRAM, crypto
PDF  283 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U545NET3QTR Datasheet(HTML) 254 Page - STMicroelectronics

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Electrical characteristics
STM32U545xx
254/283
DS14216 Rev 1
Figure 54. SPI timing diagram - slave mode and CPHA = 1
1. Measurement points are done at 0.3 VDD and 0.7 VDD levels.
Figure 55. SPI timing diagram - master mode
1. Measurement points are done at 0.3 VDD and 0.7 VDD levels.
MSv41659V1
NSS input
CPHA=1
CPOL=0
CPHA=1
CPOL=1
MISO output
MOSI input
tsu(SI)
th(SI)
tw(SCKL)
tw(SCKH)
tsu(NSS)
tc(SCK)
ta(SO)
tv(SO)
First bit OUT
Next bits OUT
Next bits IN
Last bit OUT
th(SO)
tr(SCK)
tf(SCK)
th(NSS)
tdis(SO)
First bit IN
Last bit IN
ai14136d
CPHA=0
CPOL=0
MOSI
OUTPUT
MISO
INPUT
CPHA=0
CPOL=1
LSB OUT
LSB IN
BIT1 OUT
NSS input
tc(SCK)
tw(SCKH)
tw(SCKL)
tr(SCK)
tf(SCK)
th(MI)
High
CPHA=1
CPOL=0
CPHA=1
CPOL=1
tsu(MI)
tv(MO)
th(MO)
MSB IN
BIT6 IN
MSB OUT



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