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STM32U535NET3QTR Datasheet(PDF) 54 Page - STMicroelectronics |
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STM32U535NET3QTR Datasheet(HTML) 54 Page - STMicroelectronics |
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54 / 278 page ![]() Functional overview STM32U535xx 54/278 DS14217 Rev 1 3.20 Cyclic redundancy check calculation unit (CRC) The CRC is used to get a CRC code using a configurable generator with polynomial value and size. Among other applications, the CRC-based techniques are used to verify data transmission or storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a mean to verify the flash memory integrity. The CRC calculation unit helps to compute a signature of the software during runtime, that can be ulteriorly compared with a reference signature generated at link-time and that can be stored at a given memory location. 3.21 CORDIC co-processor (CORDIC) The CORDIC co-processor provides hardware acceleration of certain mathematical functions, notably trigonometric, commonly used in motor control, metering, signal processing and many other applications. It speeds up the calculation of these functions compared to a software implementation, allowing a lower operating frequency, or freeing up processor cycles in order to perform other tasks. The CORDIC main features are: • 24-bit CORDIC rotation engine • Circular and hyperbolic modes • Rotation and vectoring modes • Functions: sine, cosine, sinh, cosh, atan, atan2, atanh, modulus, square root, natural logarithm • Programmable precision • Low-latency AHB slave interface • Results can be read as soon as ready without polling or interrupt • DMA read and write channels • Multiple register read/write by DMA 3.22 Filter math accelerator (FMAC) The FMAC performs arithmetic operations on vectors. It comprises a MAC (multiplier/accumulator) unit, together with address generation logic that allows it to index vector elements held in local memory. The unit includes support for circular buffers on input and output, that allows digital filters to be implemented. Both finite and infinite impulse response filters can be done. The unit allows frequent or lengthy filtering operations to be offloaded from the CPU, freeing up the processor for other tasks. In many cases it can accelerate such calculations compared to a software implementation, resulting in a speed-up of time critical tasks. The FMAC main features are: • 16 x 16-bit multiplier • 24 + 2-bit accumulator with addition and subtraction • 16-bit input and output data |
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