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STM32U535NET3QTR Datasheet(PDF) 72 Page - STMicroelectronics |
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STM32U535NET3QTR Datasheet(HTML) 72 Page - STMicroelectronics |
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72 / 278 page  Functional overview STM32U535xx 72/278 DS14217 Rev 1 • 16-bit ARR autoreload register • 16-bit capture/compare register • Continuous/One-shot mode • Selectable software/hardware input trigger • Programmable digital glitch filter • Configurable output: pulse, PWM • Configurable I/O polarity • Encoder mode • Repetition counter • Up to 2 independent channels for: – Input capture – PWM generation (edge-aligned mode) – One-pulse mode output • Interrupt generation on 10 events • DMA request generation on the following events: – Update event – Input capture 3.36.5 Infrared interface (IRTIM) An infrared interface (IRTIM) for remote control is available on the device. It can be used with an infrared LED to perform remote control functions. It uses internal connections with TIM16 and TIM17. 3.36.6 Independent watchdog (IWDG) The independent watchdog is based on a 12-bit downcounter and a 8-bit prescaler. It is clocked from an independent 32 kHz internal RC (LSI) and, as it operates independently from the main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog to reset the device when a problem occurs, or as a free running timer for application timeout management. It is hardware or software configurable through the option bytes. The counter can be frozen in Debug mode. 3.36.7 Window watchdog (WWDG) The window watchdog is based on a 7-bit downcounter that can be set as free running. It can be used as a watchdog to reset the device when a problem occurs. It is clocked from the main clock. It has an early warning interrupt capability and the counter can be frozen in Debug mode. 3.36.8 SysTick timer The Cortex-M33 with TrustZone embeds two SysTick timers. When TrustZone is activated, two SysTick timer are available: • SysTick, secure instance • SysTick, nonsecure instance |
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